diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2016-11-30 12:11:15 +0530 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-01-11 21:27:11 +0100 |
| commit | 4ee6eeea41c1ca6ec4255d5330fe7c7d1775eea6 (patch) | |
| tree | 37ccf5460a0ad263e6f293c7a31491d346c62aec /drivers | |
| parent | a589542ca5e6836d326d93d884a7d57a2119a6e1 (diff) | |
video: dcu: Add DCU support for Vybrid SoC
The Vybrid SoC family has the same display controller unit (DCU)
like the LS1021A SoC. This patch adds platform data, pinmux defines
and clock control to enable the driver for Vybrid based boards too.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/video/fsl_dcu_fb.c | 40 |
1 files changed, 30 insertions, 10 deletions
diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c index d4cd382776..88db41041a 100644 --- a/drivers/video/fsl_dcu_fb.c +++ b/drivers/video/fsl_dcu_fb.c @@ -40,7 +40,7 @@ #define DCU_VSYN_PARA_BP(x) ((x) << 22) #define DCU_VSYN_PARA_PW(x) ((x) << 11) #define DCU_VSYN_PARA_FP(x) (x) -#define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) +#define DCU_SYN_POL_INV_PXCK_FALL (1 << 6) #define DCU_SYN_POL_NEG_REMAIN (0 << 5) #define DCU_SYN_POL_INV_VS_LOW (1 << 1) #define DCU_SYN_POL_INV_HS_LOW (1) @@ -101,7 +101,7 @@ static struct fb_videomode fsl_dcu_mode_480_272 = { /* * This setting is used for Siliconimage SiI9022A HDMI */ -static struct fb_videomode fsl_dcu_mode_640_480 = { +static struct fb_videomode fsl_dcu_cea_mode_640_480 = { .name = "640x480-60", .refresh = 60, .xres = 640, @@ -117,6 +117,22 @@ static struct fb_videomode fsl_dcu_mode_640_480 = { .vmode = FB_VMODE_NONINTERLACED, }; +static struct fb_videomode fsl_dcu_mode_640_480 = { + .name = "640x480-60", + .refresh = 60, + .xres = 640, + .yres = 480, + .pixclock = 25175, + .left_margin = 40, + .right_margin = 24, + .upper_margin = 32, + .lower_margin = 11, + .hsync_len = 96, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, +}; + /* * DCU register map */ @@ -175,7 +191,7 @@ static void reset_total_layers(void) struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR; int i; - for (i = 0; i < DCU_LAYER_MAX_NUM; i++) { + for (i = 0; i < DCU_TOTAL_LAYER_NUM; i++) { dcu_write32(®s->ctrldescl[i][0], 0); dcu_write32(®s->ctrldescl[i][1], 0); dcu_write32(®s->ctrldescl[i][2], 0); @@ -185,11 +201,11 @@ static void reset_total_layers(void) dcu_write32(®s->ctrldescl[i][6], 0); dcu_write32(®s->ctrldescl[i][7], 0); dcu_write32(®s->ctrldescl[i][8], 0); +#ifdef CONFIG_LS102XA dcu_write32(®s->ctrldescl[i][9], 0); dcu_write32(®s->ctrldescl[i][10], 0); +#endif } - - dcu_write32(®s->update_mode, DCU_UPDATE_MODE_READREG); } static int layer_ctrldesc_init(int index, u32 pixel_format) @@ -243,8 +259,6 @@ static int layer_ctrldesc_init(int index, u32 pixel_format) dcu_write32(®s->ctrldescl[index][7], DCU_CTRLDESCLN_8_FG_FCOLOR(0)); dcu_write32(®s->ctrldescl[index][8], DCU_CTRLDESCLN_9_BG_BCOLOR(0)); - dcu_write32(®s->update_mode, DCU_UPDATE_MODE_READREG); - return 0; } @@ -262,8 +276,6 @@ int fsl_dcu_init(unsigned int xres, unsigned int yres, memset(info.screen_base, 0, info.screen_size); reset_total_layers(); - div = dcu_set_pixel_clock(info.var.pixclock); - dcu_write32(®s->div_ratio, (div - 1)); dcu_write32(®s->disp_size, DCU_DISP_SIZE_DELTA_Y(info.var.yres) | @@ -302,6 +314,11 @@ int fsl_dcu_init(unsigned int xres, unsigned int yres, layer_ctrldesc_init(0, pixel_format); + div = dcu_set_pixel_clock(info.var.pixclock); + dcu_write32(®s->div_ratio, (div - 1)); + + dcu_write32(®s->update_mode, DCU_UPDATE_MODE_READREG); + return 0; } @@ -327,7 +344,10 @@ void *video_hw_init(void) fsl_dcu_mode_db = &fsl_dcu_mode_480_272; break; case RESOLUTION(640, 480): - fsl_dcu_mode_db = &fsl_dcu_mode_640_480; + if (!strncmp(options, "monitor=hdmi", 12)) + fsl_dcu_mode_db = &fsl_dcu_cea_mode_640_480; + else + fsl_dcu_mode_db = &fsl_dcu_mode_640_480; break; default: printf("unsupported resolution %ux%u\n", |