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authorYe Li <ye.li@nxp.com>2018-10-22 00:45:09 -0700
committerYe Li <ye.li@nxp.com>2018-10-23 20:32:59 -0700
commitb12e170792c918efc7c371f86989d34fc397fe06 (patch)
tree55ca572d1c6c7aa83cdbc87017379912ba27ac40 /drivers
parent7b800eb12b6501b9f8d78e492720c584d2cb4c31 (diff)
MLK-20026 caam: Fix CAAM RNG init hang on imx8mq RevA
Found the imx8mq Rev A chip (B0 and B1 chips are ok) boot hang at CAAM RNG init. The jobring 0 can't complete instantiation descriptor and spins on checking ORSFR_JR0. In current implementation, the descriptor and jobring input and output base address locate on TCM, because the driver uses raw_data array in jr_data_st structure as the buffer. This seems cause the issue. If switched from TCM to OCRAM, the issue will go. Since accessing TCM by CAAM is not very reliable. Add this patch to use OCRAM for SPL case. The early malloc is ready on SPL before calling board_init_f. So we can use malloc to allocate memory instead of the raw_data array. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/crypto/fsl_caam.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/crypto/fsl_caam.c b/drivers/crypto/fsl_caam.c
index 8ff1b3a28c..9733bffe7a 100644
--- a/drivers/crypto/fsl_caam.c
+++ b/drivers/crypto/fsl_caam.c
@@ -602,15 +602,22 @@ static int do_cfg_jrqueue(void)
g_jrdata.status = RING_RELOC_INIT;
} else {
u32 align_idx = 0;
+ u32 *addr;
+#if defined(CONFIG_SPL_BUILD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
+ ulong maddr = (ulong)malloc(DESC_MAX_SIZE * 2 + 8);
+ addr = (u32*)ALIGN(maddr, 8);
+#else
+ addr = g_jrdata.raw_addr;
+#endif
/* Ensure 64bits buffers addresses alignment */
- if ((uintptr_t)g_jrdata.raw_addr & 0x7)
+ if ((uintptr_t)addr & 0x7)
align_idx = 1;
g_jrdata.inrings = (struct inring_entry *)
- (&g_jrdata.raw_addr[align_idx]);
+ (&addr[align_idx]);
g_jrdata.outrings = (struct outring_entry *)
- (&g_jrdata.raw_addr[align_idx + 2]);
- g_jrdata.desc = (u32 *)(&g_jrdata.raw_addr[align_idx + 4]);
+ (&addr[align_idx + 2]);
+ g_jrdata.desc = (u32 *)(&addr[align_idx + 4]);
g_jrdata.status = RING_EARLY_INIT;
}