diff options
| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-10-03 19:50:03 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-12-03 23:04:10 -0500 |
| commit | 88718be3001055fa2801a44ab10570279b3f2cb7 (patch) | |
| tree | ec3825f5e8c3efd226917fa2745fac26c0d5c88e /include/configs/P1010RDB.h | |
| parent | 94d022bb400890f22fe35220d2519c3bce73f05e (diff) | |
mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
Add more clarity by changing the Kconfig entry name.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Diffstat (limited to 'include/configs/P1010RDB.h')
| -rw-r--r-- | include/configs/P1010RDB.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 9244feea8b..60e8904d42 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -49,7 +49,7 @@ #endif #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE @@ -388,7 +388,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_NAND_DDR_LAW 11 /* Set up IFC registers for boot location NOR/NAND */ -#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT) +#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT) #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR @@ -484,7 +484,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) #define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR @@ -558,7 +558,7 @@ extern unsigned long get_sdram_size(void); * SPI interface will not be available in case of NAND boot SPI CS0 will be * used for SLIC */ -#if !defined(CONFIG_NAND) || !defined(CONFIG_NAND_SECBOOT) +#if !defined(CONFIG_MTD_RAW_NAND) || !defined(CONFIG_NAND_SECBOOT) /* eSPI - Enhanced SPI */ #endif @@ -629,7 +629,7 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #else |