diff options
| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-08-27 11:03:30 +0000 |
|---|---|---|
| committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | 2019-08-28 13:47:45 +0530 |
| commit | 233044dd3e987dd811186b134120e1df7c304080 (patch) | |
| tree | c4f045f177ba2448f854c91477d53656d1bd16be /include/configs/T102xRDB.h | |
| parent | efd7d712dd3d3a7343bd34ad6e8f819d8ecc6a0c (diff) | |
powerpc: T102xRDB: Remove the useless macro CONFIG_ARCH_T1040
Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and
the PCIE4 related macros, as there are only 3 PCIe controllers
on T102x SoCs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Diffstat (limited to 'include/configs/T102xRDB.h')
| -rw-r--r-- | include/configs/T102xRDB.h | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 5ab51e3233..b76ce8d69f 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -494,9 +494,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ #define CONFIG_PCIE3 /* PCIE controller 3 */ -#ifdef CONFIG_ARCH_T1040 -#define CONFIG_PCIE4 /* PCIE controller 4 */ -#endif #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ #define CONFIG_PCI_INDIRECT_BRIDGE @@ -565,27 +562,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ #endif -/* controller 4, Base address 203000, to be removed */ -#ifdef CONFIG_PCIE4 -#define CONFIG_SYS_PCIE4_MEM_VIRT 0xb0000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc30000000ull -#else -#define CONFIG_SYS_PCIE4_MEM_BUS 0xb0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xb0000000 -#endif -#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE4_IO_VIRT 0xf8030000 -#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#else -#define CONFIG_SYS_PCIE4_IO_PHYS 0xf8030000 -#endif -#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ -#endif - #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ |