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authorZhao Qiang <qiang.zhao@nxp.com>2016-09-08 12:55:32 +0800
committerYork Sun <york.sun@nxp.com>2016-10-14 10:21:03 -0700
commitec90ac7359a10513f1458ad5840858e6d8be0624 (patch)
tree5ee891cc978fb64d9327d880749399f0acba931d /include/configs/T4240RDB.h
parent44afdc4a12b9f6f48338e7975e4f08cfe90dba74 (diff)
Txxx/RCW: Split unified RCW to RCWs for sd, spi and nand.
T series boards use unified RCW for sd, spi and nand boot. Now split txxx_rcw.cfg to txxx_sd_rcw.cfg, txxx_spi_rcw.cfg and txxx_nand_rcw.cfg for SPI/NAND/SD boot. And modify RCW[PBI_SRC] for them: PBI_SRC=5 for SPI 24-bit addressing PBI_SRC=6 for SD boot PBI_SRC=14 for IFC NAND boot Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/T4240RDB.h')
-rw-r--r--include/configs/T4240RDB.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index a0580a84de..77323a7bb2 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -19,7 +19,6 @@
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg
-#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_rcw.cfg
#ifndef CONFIG_SDCARD
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
@@ -45,6 +44,7 @@
#define CONFIG_SYS_MPC85XX_NO_RESETVEC
#endif
#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
+#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg
#define CONFIG_SPL_MMC_BOOT
#endif