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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-05-09 03:01:32 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2013-05-09 03:01:32 +0200 |
| commit | fbcc83d7214d1e2989201b692c07f9b3241af4cf (patch) | |
| tree | b24d502577a0a5b7fa510347d04befbe1396a7b7 /include/configs/apalis_t30.h | |
| parent | 72dd7f8c0934988e3cf2553b5f97de68e28156e8 (diff) | |
apalis/colibri_t30: increase CPU frequency at boot
Due to a unoptimised PLL X table we were only running at 400MHz during
boot.
Incorporated the PLL X table from NVIDIA's latest public U-Boot sources:
http://nv-tegra.nvidia.com/gitweb/?p=3rdparty/u-boot.git;a=blob;f=arch/arm/cpu/arm720t/tegra-common/cpu.c;h=119342e9577f6b42f93d118b81c0e931c9c9423a;hb=chromeos/v2013.01.01-tegra114#l67
And actually set up the T30 PLLs regardless of slow flag as this is
anyway exclusively used on T20.
Issue report courtesy of Mariusz Bulkowski from Draminski.
Diffstat (limited to 'include/configs/apalis_t30.h')
0 files changed, 0 insertions, 0 deletions