diff options
| author | Wenyou Yang <wenyou.yang@atmel.com> | 2017-04-18 15:15:48 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2017-05-09 12:14:15 -0600 |
| commit | 59b37122b10b1d5d1d8c2b6833cc1075e7275892 (patch) | |
| tree | f65ba08b133929814a581e54b2c0089becd031f9 /include/configs/at91sam9m10g45ek.h | |
| parent | c1868adf6444e8fb600575affb634cad2f2ff8f5 (diff) | |
configs: at91sam9m10g45ek: Update to support DM/DT
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/at91sam9m10g45ek.h')
| -rw-r--r-- | include/configs/at91sam9m10g45ek.h | 31 |
1 files changed, 2 insertions, 29 deletions
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index a62b70b459..010ebdbd40 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -30,13 +30,6 @@ /* general purpose I/O */ #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -#define CONFIG_AT91_GPIO -#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ - -/* serial console */ -#define CONFIG_ATMEL_USART -#define CONFIG_USART_BASE ATMEL_BASE_DBGU -#define CONFIG_USART_ID ATMEL_ID_SYS /* LCD */ #define LCD_BPP LCD_COLOR8 @@ -49,12 +42,6 @@ /* board specific(not enough SRAM) */ #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 -/* LED */ -#define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ -#define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ - - /* * BOOTP options */ @@ -75,7 +62,7 @@ #define CONFIG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) /* NAND flash */ #ifdef CONFIG_CMD_NAND @@ -92,24 +79,10 @@ #endif -/* MMC */ - -#ifdef CONFIG_CMD_MMC -#define CONFIG_GENERIC_ATMEL_MCI -#endif - /* Ethernet */ -#define CONFIG_MACB -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R #define CONFIG_AT91_WANTS_COMMON_PHY -/* USB */ -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_ATMEL -#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 - #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE @@ -118,7 +91,7 @@ #ifdef CONFIG_SYS_USE_NANDFLASH /* bootstrap + u-boot + env in nandflash */ #define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_OFFSET 0xc0000 +#define CONFIG_ENV_OFFSET 0x120000 #define CONFIG_ENV_OFFSET_REDUND 0x100000 #define CONFIG_ENV_SIZE 0x20000 |