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authorMario Six <mario.six@gdsys.cc>2019-01-21 09:17:54 +0100
committerMario Six <mario.six@gdsys.cc>2019-05-21 07:52:25 +0200
commit21c1502a4a81904706b9883f523ec4a94aba880f (patch)
treec04e236d3366a84cdad3b19eb297f33d89d3c283 /include/configs/ids8313.h
parentff3bb0c435e0d10ccb61a8fd2dada3ae72f1f97e (diff)
mpc83xx: Kconfig: Migrate HRCW to Kconfig
The HRCW (hardware reset configuration word) is a constant that must be hard-coded into the boot loader image. So, it must be available at compile time, and cannot be migrated to the DT mechanism, but has to be kept in Kconfig. Configuration of this crucial variable should still be somewhat comfortable. Hence, make its fields configurable in Kconfig, and assemble the final value from these. Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/ids8313.h')
-rw-r--r--include/configs/ids8313.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index eff0addd51..4e5927ed70 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -25,27 +25,6 @@
#define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
-/*
- * Hardware Reset Configuration Word
- * if CLKIN is 66.000MHz, then
- * CSB = 132MHz, CORE = 264MHz, DDRC = 264MHz, LBC = 132MHz
- */
-#define CONFIG_SYS_HRCW_LOW (0x20000000 /* reserved, must be set */ |\
- HRCWL_DDR_TO_SCB_CLK_2X1 |\
- HRCWL_CSB_TO_CLKIN_2X1 |\
- HRCWL_CORE_TO_CSB_2X1)
-
-#define CONFIG_SYS_HRCW_HIGH (HRCWH_PCI_HOST |\
- HRCWH_CORE_ENABLE |\
- HRCWH_FROM_0XFFF00100 |\
- HRCWH_BOOTSEQ_DISABLE |\
- HRCWH_SW_WATCHDOG_DISABLE |\
- HRCWH_ROM_LOC_LOCAL_8BIT |\
- HRCWH_RL_EXT_LEGACY |\
- HRCWH_TSEC1M_IN_MII |\
- HRCWH_TSEC2M_IN_MII |\
- HRCWH_BIG_ENDIAN)
-
#define CONFIG_SYS_SICRH 0x00000000
#define CONFIG_SYS_SICRL (SICRL_LBC | SICRL_SPI_D)