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authorAllen Martin <amartin@nvidia.com>2012-08-31 08:30:00 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:21 +0200
commit00a2749d7be5b0e6cb6435187ec8fea600b44627 (patch)
tree3d3107a9b369a09ba5c40abff80d23788939b48d /include/configs/trimslice.h
parent0d04f34a357d004364b58159b64aad354e65137e (diff)
tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'include/configs/trimslice.h')
-rw-r--r--include/configs/trimslice.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h
index 34be8a98a1..b3c524981f 100644
--- a/include/configs/trimslice.h
+++ b/include/configs/trimslice.h
@@ -25,21 +25,21 @@
#define __CONFIG_H
#include <asm/sizes.h>
-#include "tegra2-common.h"
+#include "tegra20-common.h"
/* Enable fdt support for TrimSlice. Flash the image in u-boot-dtb.bin */
-#define CONFIG_DEFAULT_DEVICE_TREE tegra2-trimslice
+#define CONFIG_DEFAULT_DEVICE_TREE tegra20-trimslice
#define CONFIG_OF_CONTROL
#define CONFIG_OF_SEPARATE
/* High-level configuration options */
-#define V_PROMPT "Tegra2 (TrimSlice) # "
-#define CONFIG_TEGRA2_BOARD_STRING "Compulab Trimslice"
+#define V_PROMPT "Tegra20 (TrimSlice) # "
+#define CONFIG_TEGRA20_BOARD_STRING "Compulab Trimslice"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
-#define CONFIG_TEGRA2_ENABLE_UARTA
-#define CONFIG_TEGRA2_UARTA_GPU
+#define CONFIG_TEGRA20_ENABLE_UARTA
+#define CONFIG_TEGRA20_UARTA_GPU
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE
@@ -94,6 +94,6 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
-#include "tegra2-common-post.h"
+#include "tegra20-common-post.h"
#endif /* __CONFIG_H */