diff options
| author | Mateusz Kulikowski <mateusz.kulikowski@gmail.com> | 2016-03-31 23:12:27 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-04-01 17:18:12 -0400 |
| commit | 04868b407b624c414805c9e9a79195eeb3a14829 (patch) | |
| tree | 00b6fdabb2f0c636aa428ce9040baca46be639f0 /include | |
| parent | 5a8221181edca991f7cfbf90b7f60ebf3c0b4970 (diff) | |
drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dm/uclass-id.h | 1 | ||||
| -rw-r--r-- | include/spmi/spmi.h | 46 |
2 files changed, 47 insertions, 0 deletions
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 37c4176d57..cbf9b2ca23 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -66,6 +66,7 @@ enum uclass_id { UCLASS_RTC, /* Real time clock device */ UCLASS_SERIAL, /* Serial UART */ UCLASS_SPI, /* SPI bus */ + UCLASS_SPMI, /* System Power Management Interface bus */ UCLASS_SPI_FLASH, /* SPI flash */ UCLASS_SPI_GENERIC, /* Generic SPI flash target */ UCLASS_SYSCON, /* System configuration device */ diff --git a/include/spmi/spmi.h b/include/spmi/spmi.h new file mode 100644 index 0000000000..3242e6bbd0 --- /dev/null +++ b/include/spmi/spmi.h @@ -0,0 +1,46 @@ +#ifndef _SPMI_SPMI_H +#define _SPMI_SPMI_H + +/** + * struct dm_spmi_ops - SPMI device I/O interface + * + * Should be implemented by UCLASS_SPMI device drivers. The standard + * device operations provides the I/O interface for it's childs. + * + * @read: read register 'reg' of slave 'usid' and peripheral 'pid' + * @write: write register 'reg' of slave 'usid' and peripheral 'pid' + * + * Each register is 8-bit, both read and write can return negative values + * on error. + */ +struct dm_spmi_ops { + int (*read)(struct udevice *dev, int usid, int pid, int reg); + int (*write)(struct udevice *dev, int usid, int pid, int reg, + uint8_t value); +}; + +/** + * spmi_reg_read() - read a register from specific slave/peripheral + * + * @dev: SPMI bus to read + * @usid SlaveID + * @pid Peripheral ID + * @reg: Register to read + * @return value read on success or negative value of errno. + */ +int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg); + +/** + * spmi_reg_write() - write a register of specific slave/peripheral + * + * @dev: SPMI bus to write + * @usid SlaveID + * @pid Peripheral ID + * @reg: Register to write + * @value: Value to write + * @return 0 on success or negative value of errno. + */ +int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg, + uint8_t value); + +#endif |