mpc83xx: Introduce ARCH_MPC830*

Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options.

Signed-off-by: Mario Six <mario.six@gdsys.cc>

8 files changed, 14 insertions, 24 deletions

diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 3827ea464b..7bf91524c8 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -12,8 +12,6 @@
  * High Level Configuration Options
  */
 #define CONFIG_E300		1 /* E300 family */
-#define CONFIG_MPC830x		1 /* MPC830x family */
-#define CONFIG_MPC8308		1 /* MPC8308 CPU specific */
 
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC83xx_ESDHC_ADDR
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 52e62778a3..23ed4e54c7 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -13,8 +13,6 @@
  */
 #define CONFIG_E300		1 /* E300 family */
 #define CONFIG_MPC83xx		1 /* MPC83xx family */
-#define CONFIG_MPC830x		1 /* MPC830x family */
-#define CONFIG_MPC8308		1 /* MPC8308 CPU specific */
 #define CONFIG_HRCON		1 /* HRCON board specific */
 
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC83xx_ESDHC_ADDR
diff --git a/include/configs/km/km8309-common.h b/include/configs/km/km8309-common.h
index 0e0b1b4605..3bd334c515 100644
--- a/include/configs/km/km8309-common.h
+++ b/include/configs/km/km8309-common.h
@@ -14,8 +14,6 @@
  */
 #define CONFIG_E300		1	/* E300 family */
 #define CONFIG_QE		1	/* Has QE */
-#define CONFIG_MPC830x		1	/* MPC830x family */
-#define CONFIG_MPC8309		1	/* MPC8309 CPU specific */
 
 #define CONFIG_KM_DEF_ARCH	"arch=ppc_82xx\0"
 
diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h
index a76f606e3e..fb2a1cb39a 100644
--- a/include/configs/km/km83xx-common.h
+++ b/include/configs/km/km83xx-common.h
@@ -135,7 +135,7 @@
 #define CONFIG_UEC_ETH
 #define CONFIG_ETHPRIME		"UEC0"
 
-#if !defined(CONFIG_MPC8309)
+#if !defined(CONFIG_ARCH_MPC8309)
 #define CONFIG_UEC_ETH1		/* GETH1 */
 #define UEC_VERBOSE_DEBUG	1
 #endif
diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index 98f030388c..c007877276 100644
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -12,8 +12,6 @@
  * High Level Configuration Options
  */
 #define CONFIG_E300		1 /* E300 family */
-#define CONFIG_MPC830x		1 /* MPC830x family */
-#define CONFIG_MPC8308		1 /* MPC8308 CPU specific */
 
 /*
  * On-board devices
diff --git a/include/configs/strider.h b/include/configs/strider.h
index 972543d6bd..89e0610871 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -13,8 +13,6 @@
  */
 #define CONFIG_E300		1 /* E300 family */
 #define CONFIG_MPC83xx		1 /* MPC83xx family */
-#define CONFIG_MPC830x		1 /* MPC830x family */
-#define CONFIG_MPC8308		1 /* MPC8308 CPU specific */
 #define CONFIG_STRIDER		1 /* STRIDER board specific */
 
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC83xx_ESDHC_ADDR
diff --git a/include/linux/immap_qe.h b/include/linux/immap_qe.h
index 51800096b2..f7bc503ea3 100644
--- a/include/linux/immap_qe.h
+++ b/include/linux/immap_qe.h
@@ -16,7 +16,7 @@
 #define QE_MURAM_SIZE		0xc000UL
 #define MAX_QE_RISC		2
 #define QE_NUM_OF_SNUM		28
-#elif defined(CONFIG_MPC832x) || defined(CONFIG_MPC8309)
+#elif defined(CONFIG_MPC832x) || defined(CONFIG_ARCH_MPC8309)
 #define QE_MURAM_SIZE		0x4000UL
 #define MAX_QE_RISC		1
 #define QE_NUM_OF_SNUM		28
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index a4c5bd3837..e93f50d0b3 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -129,7 +129,7 @@
 #define SPCR_TSEC2EP			0x00000003
 #define SPCR_TSEC2EP_SHIFT		(31-31)
 
-#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \
 	defined(CONFIG_MPC837x)
 /* SPCR bits - MPC8308, MPC831x and MPC837x specific */
 /* TSEC data priority */
@@ -336,7 +336,7 @@
 #define SICRH_SPI			0x00000003
 #define SICRH_SPI_SD			0x00000001
 
-#elif defined(CONFIG_MPC8308)
+#elif defined(CONFIG_ARCH_MPC8308)
 /* SICRL bits - MPC8308 specific */
 #define SICRL_SPI_PF0			(0 << 28)
 #define SICRL_SPI_PF1			(1 << 28)
@@ -384,7 +384,7 @@
 #define SICRH_TSOBI2_V3P3		(0 << 0)
 #define SICRH_TSOBI2_V2P5		(1 << 0)
 
-#elif defined(CONFIG_MPC8309)
+#elif defined(CONFIG_ARCH_MPC8309)
 /* SICR_1 */
 #define SICR_1_UART1_UART1S		(0 << (30-2))
 #define SICR_1_UART1_UART1RTS		(1 << (30-2))
@@ -639,7 +639,7 @@
 #define HRCWL_CE_TO_PLL_1X30		0x0000001E
 #define HRCWL_CE_TO_PLL_1X31		0x0000001F
 
-#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315)
+#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC8315)
 #define HRCWL_SVCOD			0x30000000
 #define HRCWL_SVCOD_SHIFT		28
 #define HRCWL_SVCOD_DIV_2		0x00000000
@@ -654,7 +654,7 @@
 #define HRCWL_SVCOD_DIV_8		0x10000000
 #define HRCWL_SVCOD_DIV_2		0x20000000
 #define HRCWL_SVCOD_DIV_1		0x30000000
-#elif defined(CONFIG_MPC8309)
+#elif defined(CONFIG_ARCH_MPC8309)
 
 #define HRCWL_CEVCOD			0x000000C0
 #define HRCWL_CEVCOD_SHIFT		6
@@ -765,7 +765,7 @@
 #define HRCWH_ROM_LOC_LOCAL_16BIT	0x00600000
 #define HRCWH_ROM_LOC_LOCAL_32BIT	0x00700000
 
-#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \
 	defined(CONFIG_MPC837x)
 #define HRCWH_ROM_LOC_NAND_SP_8BIT	0x00100000
 #define HRCWH_ROM_LOC_NAND_SP_16BIT	0x00200000
@@ -818,7 +818,7 @@
 /*
  * RSR - Reset Status Register
  */
-#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x) || \
 	defined(CONFIG_MPC837x)
 #define RSR_RSTSRC			0xF0000000	/* Reset source */
 #define RSR_RSTSRC_SHIFT		28
@@ -986,7 +986,7 @@
 #define SCCR_USBDRCM_2			0x00200000
 #define SCCR_USBDRCM_3			0x00300000
 
-#elif defined(CONFIG_MPC8308) || defined(CONFIG_MPC8315)
+#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC8315)
 /* SCCR bits - MPC8315/MPC8308 specific */
 #define SCCR_TSEC1CM			0xc0000000
 #define SCCR_TSEC1CM_SHIFT		30
@@ -1071,7 +1071,7 @@
 #define SCCR_SATACM_1			0x00000055
 #define SCCR_SATACM_2			0x000000aa
 #define SCCR_SATACM_3			0x000000ff
-#elif defined(CONFIG_MPC8309)
+#elif defined(CONFIG_ARCH_MPC8309)
 /* SCCR bits - MPC8309 specific */
 #define SCCR_SDHCCM			0x0c000000
 #define SCCR_SDHCCM_SHIFT		26
@@ -1117,7 +1117,7 @@
  */
 #define CSCONFIG_EN			0x80000000
 #define CSCONFIG_AP			0x00800000
-#if defined(CONFIG_MPC830x) || defined(CONFIG_MPC831x)
+#if defined(CONFIG_ARCH_MPC830X) || defined(CONFIG_MPC831x)
 #define CSCONFIG_ODT_RD_NEVER		0x00000000
 #define CSCONFIG_ODT_RD_ONLY_CURRENT	0x00100000
 #define CSCONFIG_ODT_RD_ONLY_OTHER_CS	0x00200000
@@ -1239,14 +1239,14 @@
 #define SDRAM_CFG_SDRAM_TYPE_MASK	0x07000000
 #define SDRAM_CFG_SDRAM_TYPE_SHIFT	24
 #define SDRAM_CFG_DYN_PWR		0x00200000
-#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x)
+#if defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_MPC831x)
 #define SDRAM_CFG_DBW_MASK		0x00180000
 #define SDRAM_CFG_DBW_16		0x00100000
 #define SDRAM_CFG_DBW_32		0x00080000
 #else
 #define SDRAM_CFG_32_BE			0x00080000
 #endif
-#if !defined(CONFIG_MPC8308)
+#if !defined(CONFIG_ARCH_MPC8308)
 #define SDRAM_CFG_8_BE			0x00040000
 #endif
 #define SDRAM_CFG_NCAP			0x00020000