diff options
| author | Tom Rini <trini@konsulko.com> | 2020-06-24 09:05:35 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-06-24 09:05:35 -0400 |
| commit | 922c6d5d0090e51fdd5bb75795c3384a18f5d2b6 (patch) | |
| tree | 434b45e0a8a458884dbb0119da404808a2f4f488 /include | |
| parent | 331c7438104149655a5fe96ed4a3d29b00d422de (diff) | |
| parent | f12341a9529540113f01989149bbbeb68662a829 (diff) | |
Merge tag 'mmc-2020-6-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Fix fsl_esdhc_imx tunning mask
- Disable CMD CRC for normal tuning for fsl_esdhc_imx
- Retry CM1 until emmc ready
- Fix sdhci HISPD handling
- Cache-aligned extcsd reading
Diffstat (limited to 'include')
| -rw-r--r-- | include/fsl_esdhc_imx.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index 33c6d52bfe..279a66d9bf 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -203,7 +203,8 @@ #define ESDHC_STD_TUNING_EN BIT(24) /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ #define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff +#define ESDHC_TUNING_START_TAP_MASK 0x7f +#define ESDHC_TUNING_CMD_CRC_CHECK_DISABLE BIT(7) #define ESDHC_TUNING_STEP_MASK 0x00070000 #define ESDHC_TUNING_STEP_SHIFT 16 |