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authorGabe Black <gabeblack@chromium.org>2011-09-19 13:54:46 -0700
committerGabe Black <gabeblack@chromium.org>2011-09-20 20:51:50 -0700
commitce5e1d1e03e126d6d5ee46cea9814cfaa44fa8ff (patch)
treeb0a90188c9637904fae7703a6de1c48bcacfa909 /lib
parentb2b2752f33666d6cd78f95eb657a152ad77e1a8b (diff)
Set up basic vboot data for use by crossystem
This change sets up basic vboot data for use by crossystem. The pieces of information and what they're set to are below. I assumed that the constants defined in the coreboot version of this code describe all of the available settings for each option. Boot reason: BOOT_REASON_OTHER The choices here are BOOT_REASON_OTHER and BOOT_REASON_S3DIAG. I don't know what BOOT_REASON_S3DIAG is for or how to detect which to use. I believe S3 resume happens without going through u-boot, so hardcoding this to BOOT_REASON_OTHER seems reasonable for now at least. Active main firmware: ACTIVE_MAINFW_RW_A The choices are ACTIVE_MAINFW_RECOVERY, ACTIVE_MAINFW_RW_A and ACTIVE_MAINFW_RW_B. This information isn't stored in the crossystem_data_t structure. For now it's hard coded to ACTIVE_MAINFW_RW_A which is going to frequently be wrong. I suspect we also need to add a value which indicates that the read only firmware was used by itself. Active EC firmware: cdata->active_ec_firmware A direct match with data already gathered by u-boot/vboot. CHSW: Translation from booleans to bitfields. The cdata boot_write_protect_switch, boot_recovery_switch, and boot_developer_switch boolean fields are translated into the CHSW_FIRMWARE_WP_DIS, CHSW_RECOVERY_X86 and CHSW_DEVELOPER_SWITCH bitfields. The CHSW_RECOVER_EC bitfield is ignored since there's no obviously corresponding field in crossystem_data_t. HWID: cdata->hardware_id A direct match with data already gathered by u-boot/vboot. FWID: cdata->firmware_id A direct match with data already gathered by u-boot/vboot. FRID: cdata->readonly_firmware_id A direct match with data already gathered by u-boot/vboot. Active main firmware type: cdata->firmware_type A direct match with data already gathered by u-boot/vboot. Recovery reason: RECOVERY_REASON_NONE The choices are RECOVERY_REASON_NONE and RECOVERY_REASON_ME. Since u-boot has no information about the ME, this is hardcoded to RECOVERY_REASON_NONE. FMAP base address: cdata->fmap_offset An assumed direct match with data already gathered by u-boot/vboot. There is a little ambiguity as far as what this is the offset of and from. BUG=chrome-os-partner:5944 BUG=chrome-os-partner:5961 BUG=chrome-os-partner:5962 TEST=Booted successfully on both stumpy and alex. Used crossystem to verify that information like the firmware ID was extracted successfully. The GPIOs, which are not sent with this mechanism, seem to work sometimes but not always. Signed-off-by: Gabe Black <gabeblack@google.com> Change-Id: If7ea2a6470d8edf7122f87f289c19d4464775e8c Reviewed-on: http://gerrit.chromium.org/gerrit/7977 Commit-Ready: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
Diffstat (limited to 'lib')
-rw-r--r--lib/chromeos/boot_kernel.c2
-rw-r--r--lib/chromeos/crossystem_data.c46
2 files changed, 48 insertions, 0 deletions
diff --git a/lib/chromeos/boot_kernel.c b/lib/chromeos/boot_kernel.c
index 2012bea6f3..2edb5523ed 100644
--- a/lib/chromeos/boot_kernel.c
+++ b/lib/chromeos/boot_kernel.c
@@ -256,6 +256,8 @@ int boot_kernel(VbSelectAndLoadKernelParams *kparams, crossystem_data_t *cdata)
#endif /* CONFIG_OF_UPDATE_FDT_BEFORE_BOOT */
#ifdef CONFIG_X86
+ crossystem_data_update_acpi(cdata);
+
params = (struct boot_params *)(uintptr_t)
(kparams->bootloader_address - CROS_PARAMS_SIZE);
if (!setup_zimage(params, cmdline, 0, 0, 0))
diff --git a/lib/chromeos/crossystem_data.c b/lib/chromeos/crossystem_data.c
index c2fbaeeebb..3720254c86 100644
--- a/lib/chromeos/crossystem_data.c
+++ b/lib/chromeos/crossystem_data.c
@@ -27,6 +27,8 @@
#define PREFIX "crossystem_data: "
+DECLARE_GLOBAL_DATA_PTR;
+
int crossystem_data_init(crossystem_data_t *cdata,
cros_gpio_t *write_protect_switch,
cros_gpio_t *recovery_switch,
@@ -236,6 +238,50 @@ int crossystem_data_embed_into_fdt(crossystem_data_t *cdata, void *fdt,
}
#endif /* ^^^^ CONFIG_OF_LIBFDT NOT defined ^^^^ */
+#ifdef CONFIG_X86
+int crossystem_data_update_acpi(crossystem_data_t *cdata)
+{
+ const void *fdt = gd->blob;
+ int node_offset, len;
+ const uint32_t *cell;
+ chromeos_acpi_t *acpi_table;
+
+ node_offset = fdt_path_offset(fdt, "/chromeos-config");
+ if (node_offset < 0) {
+ VBDEBUG("crossystem_data_update_acpi: Couldn't access "
+ "chromeos-config.\n");
+ return 1;
+ }
+ cell = fdt_getprop(fdt, node_offset, "gnvs-vboot-table", NULL);
+ if (!cell) {
+ VBDEBUG("crossystem_data_update_acpi: Couldn't access "
+ "gnvs-vboot-table.\n");
+ return 1;
+ }
+ acpi_table = (chromeos_acpi_t *)(uintptr_t)ntohl(*cell);
+
+ acpi_table->vbt0 = BOOT_REASON_OTHER;
+ acpi_table->vbt1 = ACTIVE_MAINFW_RW_A;
+ acpi_table->vbt2 = cdata->active_ec_firmware;
+ acpi_table->vbt3 =
+ (cdata->boot_write_protect_switch ? CHSW_FIRMWARE_WP_DIS : 0) |
+ (cdata->boot_recovery_switch ? CHSW_RECOVERY_X86 : 0) |
+ (cdata->boot_developer_switch ? CHSW_DEVELOPER_SWITCH : 0);
+
+ len = min(ID_LEN, sizeof(acpi_table->vbt4));
+ memcpy(acpi_table->vbt4, cdata->hardware_id, len);
+ len = min(ID_LEN, sizeof(acpi_table->vbt5));
+ memcpy(acpi_table->vbt5, cdata->firmware_id, len);
+ len = min(ID_LEN, sizeof(acpi_table->vbt6));
+ memcpy(acpi_table->vbt6, cdata->readonly_firmware_id, len);
+
+ acpi_table->vbt7 = cdata->firmware_type;
+ acpi_table->vbt8 = RECOVERY_REASON_NONE;
+ acpi_table->vbt9 = cdata->fmap_offset;
+ return 0;
+}
+#endif
+
void crossystem_data_dump(crossystem_data_t *cdata)
{
#define _p(format, field) \