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-rw-r--r--board/da8xx/da8xx-evm/da850.c1
-rw-r--r--include/asm-arm/arch-da8xx/hardware.h8
2 files changed, 9 insertions, 0 deletions
diff --git a/board/da8xx/da8xx-evm/da850.c b/board/da8xx/da8xx-evm/da850.c
index 2ef8f54209..9702e3f368 100644
--- a/board/da8xx/da8xx-evm/da850.c
+++ b/board/da8xx/da8xx-evm/da850.c
@@ -239,6 +239,7 @@ int misc_init_r (void)
u_int8_t tmp[20], addr[10];
printf ("ARM Clock : %d Hz\n", clk_get(DAVINCI_ARM_CLKID));
+ printf ("DDR Clock : %d Hz\n", clk_get(DAVINCI_DDR_CLKID));
if (getenv("ethaddr") == NULL) {
/* Set Ethernet MAC address from EEPROM */
diff --git a/include/asm-arm/arch-da8xx/hardware.h b/include/asm-arm/arch-da8xx/hardware.h
index d0709f15a6..84789d646f 100644
--- a/include/asm-arm/arch-da8xx/hardware.h
+++ b/include/asm-arm/arch-da8xx/hardware.h
@@ -78,8 +78,10 @@
#define PLL0_SYSCLK2 (0x2)
#define PLL0_SYSCLK4 (0x4)
#define PLL0_SYSCLK6 (0x6)
+#define PLL1_SYSCLK1 ((1 << 16) | 0x1)
#define PLL1_SYSCLK2 ((1 << 16) | 0x2)
#define ASYNC3 get_async3_src()
+#define EMIFB get_emifb_src()
/* special clocks */
#define PLLM (0xFF + 1)
@@ -99,6 +101,7 @@
#define DAVINCI_UART0_CLKID PLL0_SYSCLK2
#define DAVINCI_UART2_CLKID (cpu_is_da830() ? PLL0_SYSCLK2 : ASYNC3)
#define DAVINCI_ARM_CLKID PLL0_SYSCLK6
+#define DAVINCI_DDR_CLKID EMIFB
/* Power and Sleep Controller (PSC) Domains */
#define DAVINCI_GPSC_ARMDOMAIN 0
@@ -244,6 +247,11 @@ static inline int get_async3_src(void)
return ((REG(CFGCHIP3) & 0x10) ? PLL1_SYSCLK2 : PLL0_SYSCLK2);
}
+static inline int get_emifb_src(void)
+{
+ return ((REG(CFGCHIP3) & 0x80) ? PLL1_PLLM : PLL1_SYSCLK1);
+}
+
#endif
#endif /* __ASM_ARCH_HARDWARE_H */