diff options
| -rw-r--r-- | arch/arm/cpu/armv7/vf610/generic.c | 37 | ||||
| -rw-r--r-- | board/toradex/apalis_imx6/Kconfig | 5 | ||||
| -rw-r--r-- | board/toradex/apalis_imx6/apalis_imx6.c | 31 | ||||
| -rw-r--r-- | board/toradex/colibri_imx6/Kconfig | 5 | ||||
| -rw-r--r-- | board/toradex/colibri_imx6/colibri_imx6.c | 40 | ||||
| -rw-r--r-- | board/toradex/colibri_vf/colibri_vf.c | 6 | ||||
| -rw-r--r-- | board/toradex/common/configblock.c | 37 | ||||
| -rw-r--r-- | drivers/mtd/nand/vf610_nfc.c | 250 | ||||
| -rw-r--r-- | include/configs/apalis_imx6.h | 23 | ||||
| -rw-r--r-- | include/configs/apalis_t30.h | 12 | ||||
| -rw-r--r-- | include/configs/colibri_imx6.h | 17 | ||||
| -rw-r--r-- | include/configs/colibri_t20.h | 5 | ||||
| -rw-r--r-- | include/configs/colibri_t30.h | 12 | ||||
| -rw-r--r-- | include/configs/colibri_vf.h | 36 |
14 files changed, 318 insertions, 198 deletions
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index f0a6965aa9..be5f7f389d 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -10,6 +10,7 @@ #include <asm/arch/clock.h> #include <asm/arch/crm_regs.h> #include <asm/imx-common/boot_mode.h> +#include <asm/pl310.h> #include <netdev.h> #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> @@ -395,3 +396,39 @@ void enable_caches(void) mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option); } #endif + +#if !defined(CONFIG_SYS_L2CACHE_OFF) && defined(CONFIG_SYS_L2_PL310) +#define IOMUXC_GPR11_L2CACHE_AS_OCRAM 0x00000002 +void v7_outer_cache_enable(void) +{ + struct pl310_regs *const pl310 = (struct pl310_regs *)CA5_L2C_BASE_ADDR; + unsigned int val; + + /* Must disable the L2 before changing the latency parameters */ + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); + + writel(0x122, &pl310->pl310_tag_latency_ctrl); + writel(0x011, &pl310->pl310_data_latency_ctrl); + + val = readl(&pl310->pl310_prefetch_ctrl); + + /* Turn on the L2 I/D prefetch */ + val |= 0x30000000; + + writel(val, &pl310->pl310_prefetch_ctrl); + + val = readl(&pl310->pl310_power_ctrl); + val |= L2X0_DYNAMIC_CLK_GATING_EN; + val |= L2X0_STNDBY_MODE_EN; + writel(val, &pl310->pl310_power_ctrl); + + setbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); +} + +void v7_outer_cache_disable(void) +{ + struct pl310_regs *const pl310 = (struct pl310_regs *)CA5_L2C_BASE_ADDR; + + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); +} +#endif /* !CONFIG_SYS_L2CACHE_OFF */ diff --git a/board/toradex/apalis_imx6/Kconfig b/board/toradex/apalis_imx6/Kconfig index 67e592b475..bb451e3c6b 100644 --- a/board/toradex/apalis_imx6/Kconfig +++ b/board/toradex/apalis_imx6/Kconfig @@ -25,10 +25,11 @@ config TRDX_CFG_BLOCK_DEV default "0" config TRDX_CFG_BLOCK_PART - default "0" + default "1" +# Toradex Configblock in eMMC, at the end of 1st "boot sector" config TRDX_CFG_BLOCK_OFFSET - default "655360" + default "-512" menuconfig TRDX_CMD_IMX_MFGR bool "Enable factory testing commands for Toradex iMX 6 modules" diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 7546e19848..6232e2f9bd 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -113,7 +113,7 @@ struct i2c_pads_info i2c_pad_info1 = { } }; -/* Apalis local, PMIC, SGTL5000, STMPE811*/ +/* Apalis local, PMIC, SGTL5000, STMPE811 */ struct i2c_pads_info i2c_pad_info_loc = { .scl = { .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, @@ -203,7 +203,7 @@ int mx6_rgmii_rework(struct phy_device *phydev) /* * Bug: Apparently Apalis iMX6 does not works with Gigabit switches... * Limiting speed to 10/100Mbps, and setting master mode, seems to - * be the only way to have a successfull PHY auto negotiation. + * be the only way to have a successful PHY auto negotiation. * How to fix: Understand why Linux kernel do not have this issue. */ phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00); @@ -263,7 +263,7 @@ static int reset_enet_phy (struct mii_dev *bus) return 0; } -/* mux the Apalis GPIO pins to gpio, so they can be used from the U-Boot commandline */ +/* mux the Apalis GPIO pins to GPIO, so they can be used from the U-Boot commandline */ iomux_v3_cfg_t const gpio_pads[] = { MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), /* Apalis GPIO1 */ MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(WEAK_PULLUP), /* Apalis GPIO2 */ @@ -296,7 +296,8 @@ iomux_v3_cfg_t const usb_pads[] = { # define GPIO_USBO_EN IMX_GPIO_NR(3, 22) }; -/* if UARTs are used in DTE mode, switch the mode on all UARTs before +/* + * If UARTs are used in DTE mode, switch the mode on all UARTs before * any pinmuxing connects a (DCE) output to a transceiver output. */ #define UFCR 0x90 /* FIFO Control Register */ @@ -450,14 +451,14 @@ int board_eth_init(bd_t *bis) if (!bus) return 0; bus->reset = reset_enet_phy; - /* scan phy 4,5,6,7 */ + /* scan PHY 4,5,6,7 */ phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); if (!phydev) { free(bus); - puts("no phy found\n"); + puts("no PHY found\n"); return 0; } - printf("using phy at %d\n", phydev->addr); + printf("using PHY at %d\n", phydev->addr); ret = fec_probe(bis, -1, base, bus, phydev); if (ret) { printf("FEC MXC: %s:failed\n", __func__); @@ -480,7 +481,7 @@ static iomux_v3_cfg_t const backlight_pads[] = { /* PWM4 pin */ MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), #define RGB_BACKLIGHTPWM_GP IMX_GPIO_NR(2, 10) - /* buffer output enable 0: buffer enabled*/ + /* buffer output enable 0: buffer enabled */ MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(WEAK_PULLUP), #define RGB_BACKLIGHTPWM_OE IMX_GPIO_NR(5, 2) /* PSAVE# integrated VDAC */ @@ -489,8 +490,10 @@ static iomux_v3_cfg_t const backlight_pads[] = { }; static iomux_v3_cfg_t const pwr_intb_pads[] = { - /* the bootrom sets the iomux to vselect, potentially connecting - * two outputs. Set this back to GPIO */ + /* + * the bootrom sets the iomux to vselect, potentially connecting + * two outputs. Set this back to GPIO + */ MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL) }; @@ -527,7 +530,7 @@ static iomux_v3_cfg_t const rgb_pads[] = { static iomux_v3_cfg_t const vga_pads[] = { #ifdef FOR_DL_SOLO - /* Dualite/Solo doesn't have IPU2 */ + /* DualLite/Solo doesn't have IPU2 */ MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, @@ -774,7 +777,7 @@ static void setup_display(void) <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); writel(reg, &iomux->gpr[3]); - /* backlights unconditionally on for now */ + /* backlight unconditionally on for now */ imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); /* use 0 for EDT 7", use 1 for LG fullHD panel */ @@ -876,10 +879,10 @@ int checkboard_fallback(void) #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { - /* 4 bit bus width */ + /* 4-bit bus width */ {"mmc", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, {"sd", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, - {NULL, 0}, + {NULL, 0}, }; #endif diff --git a/board/toradex/colibri_imx6/Kconfig b/board/toradex/colibri_imx6/Kconfig index 13d4c26ae0..64950f348f 100644 --- a/board/toradex/colibri_imx6/Kconfig +++ b/board/toradex/colibri_imx6/Kconfig @@ -25,10 +25,11 @@ config TRDX_CFG_BLOCK_DEV default "0" config TRDX_CFG_BLOCK_PART - default "0" + default "1" +# Toradex Configblock in eMMC, at the end of 1st "boot sector" config TRDX_CFG_BLOCK_OFFSET - default "655360" + default "-512" menuconfig TRDX_CMD_IMX_MFGR bool "Enable factory testing commands for Toradex iMX 6 modules" diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 50d1d1f7b6..d8bec0cdc6 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -107,7 +107,7 @@ struct i2c_pads_info i2c_pad_info1 = { } }; -/* Colibri local, PMIC, SGTL5000, STMPE811*/ +/* Colibri local, PMIC, SGTL5000, STMPE811 */ struct i2c_pads_info i2c_pad_info_loc = { .scl = { .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC, @@ -166,7 +166,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); } -/* mux auxilary pins to gpio, so they can be used from the U-Boot commandline */ +/* mux auxiliary pins to GPIO, so they can be used from the U-Boot commandline */ iomux_v3_cfg_t const gpio_pads[] = { /* ADDRESS[17:18] [25] used as GPIO */ MX6_PAD_KEY_ROW2__GPIO4_IO11 | MUX_PAD_CTRL(WEAK_PULLUP), @@ -256,7 +256,8 @@ iomux_v3_cfg_t const usb_pads[] = { #endif }; -/* UARTs are used in DTE mode, switch the mode on all UARTs before +/* + * UARTs are used in DTE mode, switch the mode on all UARTs before * any pinmuxing connects a (DCE) output to a transceiver output. */ #define UFCR 0x90 /* FIFO Control Register */ @@ -375,7 +376,7 @@ int board_eth_init(bd_t *bis) struct phy_device *phydev = NULL; int ret; - //provide the phy clock from the i.mx6 + /* provide the PHY clock from the i.MX 6 */ ret = enable_fec_anatop_clock(ENET_50MHZ); if (ret) return ret; @@ -388,14 +389,14 @@ int board_eth_init(bd_t *bis) bus = fec_get_miibus(base, -1); if (!bus) return 0; - /* scan phy 1..7 */ + /* scan PHY 1..7 */ phydev = phy_find_by_mask(bus, 0xff, PHY_INTERFACE_MODE_RMII); if (!phydev) { free(bus); - puts("no phy found\n"); + puts("no PHY found\n"); return 0; } - printf("using phy at %d\n", phydev->addr); + printf("using PHY at %d\n", phydev->addr); ret = fec_probe(bis, -1, base, bus, phydev); if (ret) { printf("FEC MXC: %s:failed\n", __func__); @@ -407,8 +408,10 @@ int board_eth_init(bd_t *bis) } static iomux_v3_cfg_t const pwr_intb_pads[] = { - /* the bootrom sets the iomux to vselect, potentially connecting - * two outputs. Set this back to GPIO */ + /* + * the bootrom sets the iomux to vselect, potentially connecting + * two outputs. Set this back to GPIO + */ MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL) }; @@ -580,7 +583,7 @@ static void setup_display(void) <<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); writel(reg, &iomux->gpr[3]); - /* backlights unconditionally on for now */ + /* backlight unconditionally on for now */ imx_iomux_v3_setup_multiple_pads(backlight_pads, ARRAY_SIZE(backlight_pads)); /* use 0 for EDT 7", use 1 for LG fullHD panel */ @@ -656,8 +659,8 @@ int checkboard_fallback(void) #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { - {"mmc", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, - {NULL, 0}, + {"mmc", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, + {NULL, 0}, }; #endif @@ -669,11 +672,12 @@ int misc_init_r(void) return 0; } -/* On Colibri iMX6 the DDR bus width depends on the CPU type - * With Solo it is 32bit, with Dual Light 64 bit. - * U-Boot is configured to use 32bit on both models which works. +/* + * On Colibri iMX6 the DDR bus width depends on the CPU type + * With Solo it is 32-bit, with DualLite 64-bit. + * U-Boot is configured to use 32-bit on both models which works. * This commands patches this so that on subsequent boots a DL - * will use 64bit and thus all stuffed memory + * will use 64-bit and thus all stuffed memory. */ int do_patch_ddr_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) @@ -686,6 +690,8 @@ int do_patch_ddr_size(cmd_tbl_t *cmdtp, int flag, int argc, if (ivt != NULL) { /* read IVT */ mmc = find_mmc_device(0); + /* Switch to primary eMMC boot area partition */ + mmc_switch_part(0, 1); ret = mmc->block_dev.block_read(0, 2, 2, ivt); /* FIXME: Parse IVT to find DCD, parse DCD to find correct write addr */ if(ret == 2) { @@ -695,6 +701,8 @@ int do_patch_ddr_size(cmd_tbl_t *cmdtp, int flag, int argc, puts("patched, "); } } + /* Switch back to regular eMMC user partition */ + mmc_switch_part(0, 0); } if(ret == 2) puts("done.\n"); diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 89b89dae37..327273345f 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -495,6 +495,7 @@ int checkboard_fallback(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, bd_t *bd) { + int ret = 0; #ifdef CONFIG_FDT_FIXUP_PARTITIONS static struct node_info nodes[] = { { "fsl,vf610-nfc", MTD_DEV_TYPE_NAND, }, /* NAND flash */ @@ -513,8 +514,11 @@ int ft_board_setup(void *blob, bd_t *bd) do_fixup_by_compat(blob, "fsl,vf610-ddrmc", "fsl,has-cke-reset-pulls", NULL, 0, 1); #endif +#ifdef CONFIG_FSL_DCU_FB + ret = fsl_dcu_fixedfb_setup(blob); +#endif - return fsl_dcu_fixedfb_setup(blob); + return ret; } #endif diff --git a/board/toradex/common/configblock.c b/board/toradex/common/configblock.c index f007073e2b..ba6aa49a69 100644 --- a/board/toradex/common/configblock.c +++ b/board/toradex/common/configblock.c @@ -334,13 +334,14 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, struct toradex_tag *tag; size_t size = TRDX_CFG_BLOCK_MAX_SIZE; int offset = 0; - int ret; + int ret = CMD_RET_SUCCESS; + int err; /* Allocate RAM area for config block */ config_block = memalign(ARCH_DMA_MINALIGN, size); if (!config_block) { printf("Not enough malloc space available!\n"); - return -ENOMEM; + return CMD_RET_FAILURE; } memset(config_block, 0xff, size); @@ -355,33 +356,30 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, printf("NAND erase block %d need to be erased before creating " "a Toradex config block\n", CONFIG_TRDX_CFG_BLOCK_OFFSET / nand_info[0].erasesize); - ret = 0; goto out; #else char message[CONFIG_SYS_CBSIZE]; sprintf(message, "A valid Toradex config block is present, " "still recreate? [y/N] "); - if (!cli_readline(message)) { - ret = 0; + if (!cli_readline(message)) goto out; - } - if (console_buffer[0] != 'y' && console_buffer[0] != 'Y') { - ret = 0; + if (console_buffer[0] != 'y' && console_buffer[0] != 'Y') goto out; - } #endif } /* Parse new Toradex config block data... */ if (argc < 3) - ret = get_cfgblock_interactive(); + err = get_cfgblock_interactive(); else - ret = get_cfgblock_barcode(argv[2]); + err = get_cfgblock_barcode(argv[2]); - if (ret) + if (err) { + ret = CMD_RET_FAILURE; goto out; + } /* Convert serial number to MAC address (the storage format) */ trdx_eth_addr.oui = htonl(0x00142dUL << 8); @@ -416,14 +414,15 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc, memset(config_block + offset, 0, 32 - offset); #ifdef CONFIG_TRDX_CFG_BLOCK_IS_IN_MMC - ret = trdx_cfg_block_mmc_storage(config_block, 1); + err = trdx_cfg_block_mmc_storage(config_block, 1); #elif defined(CONFIG_TRDX_CFG_BLOCK_IS_IN_NAND) - ret = write_trdx_cfg_block_to_nand(config_block); + err = write_trdx_cfg_block_to_nand(config_block); #else - ret = -EINVAL; + err = -EINVAL; #endif - if (ret) { + if (err) { printf("Failed to write Toradex config block: %d\n", ret); + ret = CMD_RET_FAILURE; goto out; } @@ -446,10 +445,12 @@ static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc, return do_cfgblock_create(cmdtp, flag, argc, argv); } else if (!strcmp(argv[1], "reload")) { ret = read_trdx_cfg_block(); - if (ret) + if (ret) { printf("Failed to reload Toradex config block: %d\n", ret); - return 0; + return CMD_RET_FAILURE; + } + return CMD_RET_SUCCESS; } return CMD_RET_USAGE; diff --git a/drivers/mtd/nand/vf610_nfc.c b/drivers/mtd/nand/vf610_nfc.c index 99457d4ad1..22bda5ee45 100644 --- a/drivers/mtd/nand/vf610_nfc.c +++ b/drivers/mtd/nand/vf610_nfc.c @@ -1,5 +1,5 @@ /* - * Copyright 2009-2014 Freescale Semiconductor, Inc. and others + * Copyright 2009-2015 Freescale Semiconductor, Inc. and others * * Description: MPC5125, VF610, MCF54418 and Kinetis K70 Nand driver. * Ported to U-Boot by Stefan Agner @@ -19,9 +19,10 @@ * * Limitations: * - Untested on MPC5125 and M54418. - * - DMA not used. + * - DMA and pipelining not used. * - 2K pages or less. - * - Only 2K page w. 64+OOB and hardware ECC. + * - HW ECC: Only 2K page with 64+ OOB. + * - HW ECC: Only 24 and 32-bit error correction implemented. */ #include <common.h> @@ -53,6 +54,7 @@ #define PAGE_2K 0x0800 #define OOB_64 0x0040 +#define OOB_MAX 0x0100 /* * NFC_CMD2[CODE] values. See section: @@ -127,32 +129,33 @@ #define NFC_TIMEOUT (1000) -/* ECC status placed at end of buffers. */ -#define ECC_SRAM_ADDR ((PAGE_2K+256-8) >> 3) -#define ECC_STATUS_MASK 0x80 -#define ECC_ERR_COUNT 0x3F - /* - * ECC status is stored at NFC_CFG[ECCADD] +4 for little-endian - * and +7 for big-endian SOC. + * ECC status - seems to consume 8 bytes (double word). The documented + * status byte is located in the lowest byte of the second word (which is + * the 4th or 7th byte depending on endianness). + * Calculate an offset to store the ECC status at the end of the buffer. */ -#ifdef CONFIG_VF610 -#define ECC_OFFSET 4 -#else -#define ECC_OFFSET 7 -#endif +#define ECC_SRAM_ADDR (PAGE_2K + OOB_MAX - 8) + +#define ECC_STATUS 0x4 +#define ECC_STATUS_MASK 0x80 +#define ECC_STATUS_ERR_COUNT 0x3F + +enum vf610_nfc_alt_buf { + ALT_BUF_DATA = 0, + ALT_BUF_ID = 1, + ALT_BUF_STAT = 2, + ALT_BUF_ONFI = 3, +}; struct vf610_nfc { - struct mtd_info *mtd; - struct nand_chip chip; - void __iomem *regs; - uint column; + struct mtd_info *mtd; + struct nand_chip chip; + void __iomem *regs; + uint buf_offset; + int write_sz; /* Status and ID are in alternate locations. */ - int alt_buf; -#define ALT_BUF_ID 1 -#define ALT_BUF_STAT 2 -#define ALT_BUF_ONFI 3 - struct clk *clk; + enum vf610_nfc_alt_buf alt_buf; }; #define mtd_to_nfc(_mtd) \ @@ -170,8 +173,8 @@ static struct nand_ecclayout vf610_nfc_ecc = { 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}, .oobfree = { - {.offset = 8, - .length = 11} } + {.offset = 2, + .length = 17} } }; #elif defined(CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES) #define ECC_HW_MODE ECC_60_BYTE @@ -226,8 +229,12 @@ static inline void vf610_nfc_set_field(struct mtd_info *mtd, u32 reg, static inline void vf610_nfc_memcpy(void *dst, const void *src, size_t n) { /* - * Use this accessor for the interal SRAM buffers. On ARM we can - * treat the SRAM buffer as if its memory, hence use memcpy + * Use this accessor for the internal SRAM buffers. On the ARM + * Freescale Vybrid SoC it's known that the driver can treat + * the SRAM buffer as if it's memory. Other platform might need + * to treat the buffers differently. + * + * For the time being, use memcpy */ memcpy(dst, src, n); } @@ -242,7 +249,7 @@ static inline void vf610_nfc_clear_status(void __iomem *regbase) } /* Wait for complete operation */ -static inline void vf610_nfc_done(struct mtd_info *mtd) +static void vf610_nfc_done(struct mtd_info *mtd) { struct vf610_nfc *nfc = mtd_to_nfc(mtd); uint start; @@ -260,7 +267,7 @@ static inline void vf610_nfc_done(struct mtd_info *mtd) while (!(vf610_nfc_read(mtd, NFC_IRQ_STATUS) & IDLE_IRQ_BIT)) { if (get_timer(start) > NFC_TIMEOUT) { - printf("Timeout while waiting for !BUSY.\n"); + printf("Timeout while waiting for IDLE.\n"); return; } } @@ -273,11 +280,13 @@ static u8 vf610_nfc_get_id(struct mtd_info *mtd, int col) if (col < 4) { flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS1); - return (flash_id >> (3-col)*8) & 0xff; + flash_id >>= (3 - col) * 8; } else { flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS2); - return flash_id >> 24; + flash_id >>= 24; } + + return flash_id & 0xff; } static u8 vf610_nfc_get_status(struct mtd_info *mtd) @@ -345,26 +354,28 @@ static void vf610_nfc_command(struct mtd_info *mtd, unsigned command, int column, int page) { struct vf610_nfc *nfc = mtd_to_nfc(mtd); - int page_sz = nfc->chip.options & NAND_BUSWIDTH_16 ? 1 : 0; + int trfr_sz = nfc->chip.options & NAND_BUSWIDTH_16 ? 1 : 0; - nfc->column = max(column, 0); - nfc->alt_buf = 0; + nfc->buf_offset = max(column, 0); + nfc->alt_buf = ALT_BUF_DATA; switch (command) { case NAND_CMD_SEQIN: /* Use valid column/page from preread... */ vf610_nfc_addr_cycle(mtd, column, page); + nfc->buf_offset = 0; + /* * SEQIN => data => PAGEPROG sequence is done by the controller * hence we do not need to issue the command here... */ return; case NAND_CMD_PAGEPROG: - page_sz += mtd->writesize + mtd->oobsize; - vf610_nfc_transfer_size(nfc->regs, page_sz); + trfr_sz += nfc->write_sz; + vf610_nfc_ecc_mode(mtd, ECC_HW_MODE); + vf610_nfc_transfer_size(nfc->regs, trfr_sz); vf610_nfc_send_commands(nfc->regs, NAND_CMD_SEQIN, command, PROGRAM_PAGE_CMD_CODE); - vf610_nfc_ecc_mode(mtd, ECC_HW_MODE); break; case NAND_CMD_RESET: @@ -373,9 +384,9 @@ static void vf610_nfc_command(struct mtd_info *mtd, unsigned command, break; case NAND_CMD_READOOB: - page_sz += mtd->oobsize; + trfr_sz += mtd->oobsize; column = mtd->writesize; - vf610_nfc_transfer_size(nfc->regs, page_sz); + vf610_nfc_transfer_size(nfc->regs, trfr_sz); vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0, NAND_CMD_READSTART, READ_PAGE_CMD_CODE); vf610_nfc_addr_cycle(mtd, column, page); @@ -383,19 +394,19 @@ static void vf610_nfc_command(struct mtd_info *mtd, unsigned command, break; case NAND_CMD_READ0: - page_sz += mtd->writesize + mtd->oobsize; - column = 0; - vf610_nfc_transfer_size(nfc->regs, page_sz); + trfr_sz += mtd->writesize + mtd->oobsize; + vf610_nfc_transfer_size(nfc->regs, trfr_sz); + vf610_nfc_ecc_mode(mtd, ECC_HW_MODE); vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0, NAND_CMD_READSTART, READ_PAGE_CMD_CODE); vf610_nfc_addr_cycle(mtd, column, page); - vf610_nfc_ecc_mode(mtd, ECC_HW_MODE); break; case NAND_CMD_PARAM: nfc->alt_buf = ALT_BUF_ONFI; - vf610_nfc_transfer_size(nfc->regs, 768); - vf610_nfc_send_command(nfc->regs, NAND_CMD_PARAM, READ_ONFI_PARAM_CMD_CODE); + trfr_sz = 3 * sizeof(struct nand_onfi_params); + vf610_nfc_transfer_size(nfc->regs, trfr_sz); + vf610_nfc_send_command(nfc->regs, command, READ_ONFI_PARAM_CMD_CODE); vf610_nfc_set_field(mtd, NFC_ROW_ADDR, ROW_ADDR_MASK, ROW_ADDR_SHIFT, column); vf610_nfc_ecc_mode(mtd, ECC_BYPASS); @@ -410,7 +421,7 @@ static void vf610_nfc_command(struct mtd_info *mtd, unsigned command, case NAND_CMD_READID: nfc->alt_buf = ALT_BUF_ID; - nfc->column = 0; + nfc->buf_offset = 0; vf610_nfc_transfer_size(nfc->regs, 0); vf610_nfc_send_command(nfc->regs, command, READ_ID_CMD_CODE); vf610_nfc_set_field(mtd, NFC_ROW_ADDR, ROW_ADDR_MASK, @@ -420,21 +431,22 @@ static void vf610_nfc_command(struct mtd_info *mtd, unsigned command, case NAND_CMD_STATUS: nfc->alt_buf = ALT_BUF_STAT; vf610_nfc_transfer_size(nfc->regs, 0); - vf610_nfc_send_command(nfc->regs, command, - STATUS_READ_CMD_CODE); + vf610_nfc_send_command(nfc->regs, command, STATUS_READ_CMD_CODE); break; default: return; } vf610_nfc_done(mtd); + + nfc->write_sz = 0; } /* Read data from NFC buffers */ static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len) { struct vf610_nfc *nfc = mtd_to_nfc(mtd); - uint c = nfc->column; + uint c = nfc->buf_offset; /* Alternate buffers are only supported through read_byte */ if (nfc->alt_buf) @@ -442,28 +454,30 @@ static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len) vf610_nfc_memcpy(buf, nfc->regs + NFC_MAIN_AREA(0) + c, len); - nfc->column += len; + nfc->buf_offset += len; } /* Write data to NFC buffers */ -static void vf610_nfc_write_buf(struct mtd_info *mtd, const u_char *buf, +static void vf610_nfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) { struct vf610_nfc *nfc = mtd_to_nfc(mtd); - uint c = nfc->column; + uint c = nfc->buf_offset; uint l; - l = min((uint)len, mtd->writesize + mtd->oobsize - c); - nfc->column += l; + l = min_t(uint, len, mtd->writesize + mtd->oobsize - c); vf610_nfc_memcpy(nfc->regs + NFC_MAIN_AREA(0) + c, buf, l); + + nfc->write_sz += l; + nfc->buf_offset += l; } /* Read byte from NFC buffers */ -static u8 vf610_nfc_read_byte(struct mtd_info *mtd) +static uint8_t vf610_nfc_read_byte(struct mtd_info *mtd) { struct vf610_nfc *nfc = mtd_to_nfc(mtd); u8 tmp; - uint c = nfc->column; + uint c = nfc->buf_offset; switch (nfc->alt_buf) { case ALT_BUF_ID: @@ -472,17 +486,17 @@ static u8 vf610_nfc_read_byte(struct mtd_info *mtd) case ALT_BUF_STAT: tmp = vf610_nfc_get_status(mtd); break; +#ifdef __LITTLE_ENDIAN case ALT_BUF_ONFI: /* Reverse byte since the controller uses big endianness */ - c = nfc->column % 4; - c = nfc->column - c + (3 - c); - tmp = *((u8 *)(nfc->regs + NFC_MAIN_AREA(0) + c)); - break; + c = nfc->buf_offset ^ 0x3; + /* fall-through */ +#endif default: tmp = *((u8 *)(nfc->regs + NFC_MAIN_AREA(0) + c)); break; } - nfc->column++; + nfc->buf_offset++; return tmp; } @@ -490,6 +504,7 @@ static u8 vf610_nfc_read_byte(struct mtd_info *mtd) static u16 vf610_nfc_read_word(struct mtd_info *mtd) { u16 tmp; + vf610_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp)); return tmp; } @@ -509,12 +524,11 @@ static void vf610_nfc_select_chip(struct mtd_info *mtd, int chip) #ifdef CONFIG_VF610 u32 tmp = vf610_nfc_read(mtd, NFC_ROW_ADDR); tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK); - tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT; - if (chip == 0) - tmp |= 1 << ROW_ADDR_CHIP_SEL_SHIFT; - else if (chip == 1) - tmp |= 2 << ROW_ADDR_CHIP_SEL_SHIFT; + if (chip >= 0) { + tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT; + tmp |= (1 << chip) << ROW_ADDR_CHIP_SEL_SHIFT; + } vf610_nfc_write(mtd, NFC_ROW_ADDR, tmp); #endif @@ -535,52 +549,61 @@ static inline int count_written_bits(uint8_t *buff, int size, int max_bits) return written_bits; } -static inline int vf610_nfc_correct_data(struct mtd_info *mtd, u_char *dat) +static inline int vf610_nfc_correct_data(struct mtd_info *mtd, uint8_t *dat, + uint8_t *oob, int page) { struct vf610_nfc *nfc = mtd_to_nfc(mtd); + u32 ecc_status_off = NFC_MAIN_AREA(0) + ECC_SRAM_ADDR + ECC_STATUS; u8 ecc_status; u8 ecc_count; - int flip; + int flips; + int flips_threshold = nfc->chip.ecc.strength / 2; + + ecc_status = vf610_nfc_read(mtd, ecc_status_off) & 0xff; + ecc_count = ecc_status & ECC_STATUS_ERR_COUNT; - ecc_status = __raw_readb(nfc->regs + ECC_SRAM_ADDR * 8 + ECC_OFFSET); - ecc_count = ecc_status & ECC_ERR_COUNT; if (!(ecc_status & ECC_STATUS_MASK)) return ecc_count; - /* If 'ecc_count' zero or less then buffer is all 0xff or erased. */ - flip = count_written_bits(dat, nfc->chip.ecc.size, ecc_count); + /* Read OOB without ECC unit enabled */ + vf610_nfc_command(mtd, NAND_CMD_READOOB, 0, page); + vf610_nfc_read_buf(mtd, oob, mtd->oobsize); - /* ECC failed. */ - if (flip > ecc_count && flip > (nfc->chip.ecc.strength / 2)) - return -1; + /* + * On an erased page, bit count (including OOB) should be zero or + * at least less then half of the ECC strength. + */ + flips = count_written_bits(dat, nfc->chip.ecc.size, flips_threshold); + flips += count_written_bits(oob, mtd->oobsize, flips_threshold); + + if (unlikely(flips > flips_threshold)) + return -EINVAL; /* Erased page. */ memset(dat, 0xff, nfc->chip.ecc.size); - return 0; + memset(oob, 0xff, mtd->oobsize); + return flips; } - static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf, int oob_required, int page) { int eccsize = chip->ecc.size; int stat; - uint8_t *p = buf; - - - vf610_nfc_read_buf(mtd, p, eccsize); + vf610_nfc_read_buf(mtd, buf, eccsize); if (oob_required) vf610_nfc_read_buf(mtd, chip->oob_poi, mtd->oobsize); - stat = vf610_nfc_correct_data(mtd, p); + stat = vf610_nfc_correct_data(mtd, buf, chip->oob_poi, page); - if (stat < 0) + if (stat < 0) { mtd->ecc_stats.failed++; - else + return 0; + } else { mtd->ecc_stats.corrected += stat; - - return 0; + return stat; + } } /* @@ -589,10 +612,15 @@ static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip, static int vf610_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, int oob_required) { + struct vf610_nfc *nfc = mtd_to_nfc(mtd); + vf610_nfc_write_buf(mtd, buf, mtd->writesize); if (oob_required) vf610_nfc_write_buf(mtd, chip->oob_poi, mtd->oobsize); + /* Always write whole page including OOB due to HW ECC */ + nfc->write_sz = mtd->writesize + mtd->oobsize; + return 0; } @@ -633,12 +661,6 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr) if (cfg.width == 16) chip->options |= NAND_BUSWIDTH_16; - /* Use 8-bit mode during initialization */ - vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT); - - /* Disable subpage writes as we do not provide ecc->hwctl */ - chip->options |= NAND_NO_SUBPAGE_WRITE; - chip->dev_ready = vf610_nfc_dev_ready; chip->cmdfunc = vf610_nfc_command; chip->read_byte = vf610_nfc_read_byte; @@ -647,30 +669,22 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr) chip->write_buf = vf610_nfc_write_buf; chip->select_chip = vf610_nfc_select_chip; - /* Bad block options. */ - if (cfg.flash_bbt) - chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB | - NAND_BBT_CREATE; + chip->options |= NAND_NO_SUBPAGE_WRITE; + + chip->ecc.size = PAGE_2K; /* Set configuration register. */ + vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT); vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT); vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BUFNO_AUTO_INCR_BIT); vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BOOT_MODE_BIT); vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_DMA_REQ_BIT); vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_FAST_FLASH_BIT); - /* Enable Idle IRQ */ - vf610_nfc_set(mtd, NFC_IRQ_STATUS, IDLE_EN_BIT); - - /* PAGE_CNT = 1 */ + /* Disable virtual pages, only one elementary transfer unit */ vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CONFIG_PAGE_CNT_MASK, CONFIG_PAGE_CNT_SHIFT, 1); - /* Set ECC_STATUS offset */ - vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, - CONFIG_ECC_SRAM_ADDR_MASK, - CONFIG_ECC_SRAM_ADDR_SHIFT, ECC_SRAM_ADDR); - /* first scan to find the device and get the page size */ if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) { err = -ENXIO; @@ -680,11 +694,14 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr) if (cfg.width == 16) vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT); - chip->ecc.mode = NAND_ECC_SOFT; /* default */ + /* Bad block options. */ + if (cfg.flash_bbt) + chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB | + NAND_BBT_CREATE; /* Single buffer only, max 256 OOB minus ECC status */ - if (mtd->writesize + mtd->oobsize > PAGE_2K + 256 - 8) { - dev_err(nfc->dev, "Unsupported flash size\n"); + if (mtd->writesize + mtd->oobsize > PAGE_2K + OOB_MAX - 8) { + dev_err(nfc->dev, "Unsupported flash page size\n"); err = -ENXIO; goto error; } @@ -696,6 +713,13 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr) goto error; } + if (chip->ecc.size != mtd->writesize) { + dev_err(nfc->dev, "ecc size: %d\n", chip->ecc.size); + dev_err(nfc->dev, "Step size needs to be page size\n"); + err = -ENXIO; + goto error; + } + /* Current HW ECC layouts only use 64 bytes of OOB */ if (mtd->oobsize > 64) mtd->oobsize = 64; @@ -716,7 +740,13 @@ static int vf610_nfc_nand_init(int devnum, void __iomem *addr) chip->ecc.bytes = 60; #endif - /* Enable ECC_STATUS */ + /* Set ECC_STATUS offset */ + vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, + CONFIG_ECC_SRAM_ADDR_MASK, + CONFIG_ECC_SRAM_ADDR_SHIFT, + ECC_SRAM_ADDR >> 3); + + /* Enable ECC status in SRAM */ vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_ECC_SRAM_REQ_BIT); } diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index d8b75b40c4..e7d0d2087e 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -21,7 +21,7 @@ #define CONFIG_SYS_GENERIC_BOARD -/* Define CONFIG_APALIS_IMX6_V1_0 to use the UARTS in DCE mode unconditionally. +/* Define CONFIG_APALIS_IMX6_V1_0 to use the UARTs in DCE mode unconditionally. Otherwise U-Boot uses the Configblock to fall back to DCE on V1.0 HW */ /* #define CONFIG_APALIS_IMX6_V1_0 */ @@ -47,7 +47,7 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -/* Make the HW version stuff available in u-boot env */ +/* Make the HW version stuff available in U-Boot env */ #define CONFIG_VERSION_VARIABLE /* ver environment variable */ #define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG @@ -70,6 +70,7 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC @@ -189,6 +190,7 @@ #undef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK #undef CONFIG_IPADDR #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 @@ -253,7 +255,7 @@ "rootwait\0" \ "sdboot=run setup; " \ "setenv bootargs ${defargs} ${sdargs} ${setupargs} " \ - "${vidargs}; echo Booting from SD card in 8bit slot...; " \ + "${vidargs}; echo Booting from SD card in 8-bit slot...; " \ "run sddtbload; load mmc 1:1 ${kernel_addr_r} " \ "${boot_file} && bootm ${kernel_addr_r} ${dtbparam}\0" \ "sddtbload=setenv dtbparam; load mmc 1:1 ${fdt_addr_r} " \ @@ -271,9 +273,9 @@ #ifndef CONFIG_APALIS_IMX6_V1_0 #define FDT_FILE "imx6q-apalis-eval.dtb" -#define FDT_FILE_V1_0 "imx6q-apalis-eval_v1_0.dtb" +#define FDT_FILE_V1_0 "imx6q-apalis_v1_0-eval.dtb" #else -#define FDT_FILE "imx6q-apalis-eval_v1_0.dtb" +#define FDT_FILE "imx6q-apalis_v1_0-eval.dtb" #endif #define CONFIG_EXTRA_ENV_SETTINGS \ "bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \ @@ -289,7 +291,9 @@ MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ SD_BOOTCMD \ - "setethupdate=tftpboot ${kernel_addr_r} flash_eth.img\0" \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; tftpboot ${kernel_addr_r} " \ + "flash_eth.img\0" \ "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; " \ "load ${interface} ${drive}:1 ${kernel_addr_r} flash_blk.img " \ "|| setenv drive 2; load ${interface} ${drive}:1 " \ @@ -348,8 +352,11 @@ #define CONFIG_ENV_IS_IN_MMC #if defined(CONFIG_ENV_IS_IN_MMC) -#define CONFIG_ENV_OFFSET (512 * 1024) +/* Environment in eMMC, before config block at the end of 1st "boot sector" */ +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ + CONFIG_TRDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 1 #endif #define CONFIG_OF_LIBFDT @@ -365,4 +372,6 @@ #define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_CMD_FS_GENERIC +#define CONFIG_CRC32_VERIFY + #endif /* __CONFIG_H */ diff --git a/include/configs/apalis_t30.h b/include/configs/apalis_t30.h index 64901a91b0..bf734ebbb7 100644 --- a/include/configs/apalis_t30.h +++ b/include/configs/apalis_t30.h @@ -47,11 +47,12 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -/* Environment in eMMC, at the end of 2nd "boot sector" */ +/* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ + CONFIG_TRDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_SYS_MMC_ENV_PART 1 /* USB client support */ #define CONFIG_G_DNL_MANUFACTURER "Toradex" @@ -100,6 +101,7 @@ #undef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK #undef CONFIG_IPADDR #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 @@ -170,7 +172,9 @@ "fdt_board=eval\0" \ NFS_BOOTCMD \ SD_BOOTCMD \ - "setethupdate=tftpboot ${kernel_addr_r} flash_eth.img\0" \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; tftpboot ${kernel_addr_r} " \ + "flash_eth.img\0" \ "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; " \ "load ${interface} ${drive}:1 ${kernel_addr_r} flash_blk.img " \ "|| setenv drive 2; mmc rescan; load ${interface} ${drive}:1 " \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index f69c30c6cb..c545334275 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -40,7 +40,7 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE -/* Make the HW version stuff available in u-boot env */ +/* Make the HW version stuff available in U-Boot env */ #define CONFIG_VERSION_VARIABLE /* ver environment variable */ #define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG @@ -63,6 +63,7 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_MMC #define CONFIG_CMD_MMC #define CONFIG_GENERIC_MMC @@ -166,6 +167,7 @@ #undef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK #undef CONFIG_IPADDR #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 @@ -222,7 +224,7 @@ "rootwait\0" \ "sdboot=run setup; " \ "setenv bootargs ${defargs} ${sdargs} ${setupargs} " \ - "${vidargs}; echo Booting from SD card in 8bit slot...; " \ + "${vidargs}; echo Booting from SD card; " \ "run sddtbload; load mmc 1:1 ${kernel_addr_r} " \ "${boot_file} && bootm ${kernel_addr_r} ${dtbparam}\0" \ "sddtbload=setenv dtbparam; load mmc 1:1 ${fdt_addr_r} " \ @@ -253,7 +255,9 @@ MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ SD_BOOTCMD \ - "setethupdate=tftpboot ${kernel_addr_r} flash_eth.img\0" \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; tftpboot ${kernel_addr_r} " \ + "flash_eth.img\0" \ "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; " \ "load ${interface} ${drive}:1 ${kernel_addr_r} flash_blk.img\0" \ "setup=setenv setupargs fec_mac=${ethaddr} " \ @@ -308,8 +312,11 @@ #define CONFIG_ENV_IS_IN_MMC #if defined(CONFIG_ENV_IS_IN_MMC) -#define CONFIG_ENV_OFFSET (512 * 1024) +/* Environment in eMMC, before config block at the end of 1st "boot sector" */ +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ + CONFIG_TRDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 1 #endif #define CONFIG_OF_LIBFDT @@ -325,4 +332,6 @@ #define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_CMD_FS_GENERIC +#define CONFIG_CRC32_VERIFY + #endif /* __CONFIG_H */ diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 63e832dd6c..694c9278d8 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -130,6 +130,7 @@ #undef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK #undef CONFIG_IPADDR #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 @@ -198,7 +199,9 @@ "mtdparts=" MTDPARTS_DEFAULT "\0" \ NFS_BOOTCMD \ SD_BOOTCMD \ - "setethupdate=usb start && tftpboot ${kernel_addr_r} flash_eth.img\0" \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; usb start && tftpboot " \ + "${kernel_addr_r} flash_eth.img\0" \ "setsdupdate=setenv interface mmc; setenv drive 0; mmc rescan; " \ "load ${interface} ${drive}:1 ${kernel_addr_r} " \ "flash_blk.img\0" \ diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index 832fef5874..1a36fdae0e 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -47,11 +47,12 @@ #define CONFIG_TEGRA_MMC #define CONFIG_CMD_MMC -/* Environment in eMMC, at the end of 2nd "boot sector" */ +/* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ + CONFIG_TRDX_CFG_BLOCK_OFFSET) #define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_SYS_MMC_ENV_PART 1 /* USB client support */ #define CONFIG_G_DNL_MANUFACTURER "Toradex" @@ -92,6 +93,7 @@ #undef CONFIG_BOOTDELAY #define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK #undef CONFIG_IPADDR #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 @@ -162,7 +164,9 @@ "fdt_board=eval-v3\0" \ NFS_BOOTCMD \ SD_BOOTCMD \ - "setethupdate=usb start && tftpboot ${kernel_addr_r} flash_eth.img\0" \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; usb start && tftpboot " \ + "${kernel_addr_r} flash_eth.img\0" \ "setsdupdate=setenv interface mmc; setenv drive 1; mmc rescan; load " \ "${interface} ${drive}:1 ${kernel_addr_r} flash_blk.img\0" \ "setup=setenv setupargs asix_mac=${ethaddr} " \ diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index b96ea88bcf..b28394c9d1 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -58,7 +58,7 @@ #endif /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 4 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 8 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F @@ -138,6 +138,7 @@ #define CONFIG_SERVERIP 192.168.10.1 #define CONFIG_BOOTDELAY 1 +#define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_BOARD_LATE_INIT #define CONFIG_LOADADDR 0x80008000 @@ -180,31 +181,34 @@ #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" #define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_addr_r=0x82000000\0" \ + "console=ttyLP0\0" \ + "defargs=\0" \ + "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ "fdt_addr_r=0x84000000\0" \ - "kernel_file=zImage\0" \ "fdt_board=eval-v3\0" \ "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ "fdt_fixup=;\0" \ - "defargs=\0" \ - "console=ttyLP0\0" \ - "setup=setenv setupargs " \ - "console=tty1 console=${console}" \ - ",${baudrate}n8 ${memargs} consoleblank=0\0" \ + "kernel_addr_r=0x82000000\0" \ + "kernel_file=zImage\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + NFS_BOOTCMD \ + SD_BOOTCMD \ + "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ + "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ + "flash_eth.img && source ${loadaddr}\0" \ "setsdupdate=mmc rescan && setenv interface mmc && " \ "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ + "setup=setenv setupargs " \ + "console=tty1 console=${console}" \ + ",${baudrate}n8 ${memargs} consoleblank=0\0" \ + "setupdate=run setsdupdate || run setusbupdate || run setethupdate\0" \ "setusbupdate=usb start && setenv interface usb && " \ "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ "source ${loadaddr}\0" \ - "setupdate=run setsdupdate || run setusbupdate\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" \ - "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ - "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \ "splashpos=m,m\0" \ - SD_BOOTCMD \ - NFS_BOOTCMD \ - UBI_BOOTCMD + UBI_BOOTCMD \ + "video-mode=dcufb:640x480-16@60,monitor=lcd\0" /* Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ @@ -314,4 +318,6 @@ #define CONFIG_FSL_DSPI #endif +#define CONFIG_CRC32_VERIFY + #endif /* __CONFIG_H */ |