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-rw-r--r--board/freescale/imx8mm_ab2/imx8mm_ab2.c74
-rw-r--r--board/freescale/imx8mm_ab2/spl.c2
-rw-r--r--board/freescale/imx8mq_evk/spl.c18
-rw-r--r--board/toradex/apalis-imx8/apalis-imx8.c81
-rw-r--r--board/toradex/common/tdx-cfg-block.c114
-rw-r--r--board/toradex/common/tdx-cfg-block.h9
-rw-r--r--board/toradex/common/tdx-common.c57
-rw-r--r--board/toradex/verdin-imx8mm/lpddr4_timing.c51
-rw-r--r--board/toradex/verdin-imx8mm/verdin-imx8mm.c3
-rw-r--r--board/toradex/verdin-imx8mp/lpddr4_timing.c77
-rw-r--r--board/toradex/verdin-imx8mp/spl.c5
-rw-r--r--board/toradex/verdin-imx8mp/verdin-imx8mp.c3
12 files changed, 388 insertions, 106 deletions
diff --git a/board/freescale/imx8mm_ab2/imx8mm_ab2.c b/board/freescale/imx8mm_ab2/imx8mm_ab2.c
index 4483a8a81d..544211bec9 100644
--- a/board/freescale/imx8mm_ab2/imx8mm_ab2.c
+++ b/board/freescale/imx8mm_ab2/imx8mm_ab2.c
@@ -25,6 +25,8 @@
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/mxc_i2c.h>
#include <spl.h>
+#include <usb.h>
+#include "../common/tcpc.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -121,12 +123,84 @@ int board_phy_config(struct phy_device *phydev)
return 0;
}
+#ifdef CONFIG_USB_TCPC
+struct tcpc_port port1;
+
+struct tcpc_port_config port1_config = {
+ .i2c_bus = 1, /* i2c2*/
+ .addr = 0x1d,
+ .port_type = TYPEC_PORT_UFP,
+ .max_snk_mv = 5000,
+ .max_snk_ma = 3000,
+ .max_snk_mw = 15000,
+ .op_snk_mv = 9000,
+};
+
+static int setup_typec(void)
+{
+ int ret;
+
+ ret = tcpc_init(&port1, port1_config, NULL);
+ if (ret) {
+ printf("%s: tcpc port1 init failed, err=%d\n", __func__, ret);
+ }
+
+ return ret;
+}
+
+int board_usb_init(int index, enum usb_init_type init)
+{
+ int ret = 0;
+
+ imx8m_usb_power(index, true);
+
+ if (init == USB_INIT_HOST)
+ tcpc_setup_dfp_mode(&port1);
+ else
+ tcpc_setup_ufp_mode(&port1);
+
+ return ret;
+}
+
+int board_usb_cleanup(int index, enum usb_init_type init)
+{
+ int ret = 0;
+
+ if (init == USB_INIT_HOST)
+ ret = tcpc_disable_src_vbus(&port1);
+
+ imx8m_usb_power(index, false);
+
+ return ret;
+}
+
+int board_ehci_usb_phy_mode(struct udevice *dev)
+{
+ enum typec_cc_polarity pol;
+ enum typec_cc_state state;
+ int ret = 0;
+
+ tcpc_setup_ufp_mode(&port1);
+ ret = tcpc_get_cc_status(&port1, &pol, &state);
+ if (!ret) {
+ if (state == TYPEC_STATE_SRC_RD_RA || state == TYPEC_STATE_SRC_RD)
+ return USB_INIT_HOST;
+ }
+
+ return USB_INIT_DEVICE;
+}
+#endif
+
int board_init(void)
{
#ifdef CONFIG_DM_REGULATOR
regulators_enable_boot_on(false);
#endif
+#ifdef CONFIG_USB_TCPC
+ setup_typec();
+#endif
+
#ifdef CONFIG_FEC_MXC
setup_fec();
#endif
diff --git a/board/freescale/imx8mm_ab2/spl.c b/board/freescale/imx8mm_ab2/spl.c
index 8dd03906a6..e1dd434242 100644
--- a/board/freescale/imx8mm_ab2/spl.c
+++ b/board/freescale/imx8mm_ab2/spl.c
@@ -51,7 +51,7 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
case NAND_BOOT:
return BOOT_DEVICE_NAND;
case USB_BOOT:
- return BOOT_DEVICE_NONE;
+ return BOOT_DEVICE_BOARD;
default:
return BOOT_DEVICE_NONE;
}
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index bb8211dd7c..120810a111 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -218,6 +218,21 @@ int board_fit_config_name_match(const char *name)
}
#endif
+#define GPR_PCIE_VREG_BYPASS BIT(12)
+static void enable_pcie_vreg(bool enable)
+{
+ struct iomuxc_gpr_base_regs *gpr =
+ (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+ if (!enable) {
+ setbits_le32(&gpr->gpr[14], GPR_PCIE_VREG_BYPASS);
+ setbits_le32(&gpr->gpr[16], GPR_PCIE_VREG_BYPASS);
+ } else {
+ clrbits_le32(&gpr->gpr[14], GPR_PCIE_VREG_BYPASS);
+ clrbits_le32(&gpr->gpr[16], GPR_PCIE_VREG_BYPASS);
+ }
+}
+
void board_init_f(ulong dummy)
{
int ret;
@@ -225,6 +240,9 @@ void board_init_f(ulong dummy)
/* Clear the BSS. */
memset(__bss_start, 0, __bss_end - __bss_start);
+ /* PCIE_VPH connects to 3.3v on EVK, enable VREG to generate 1.8V to PHY */
+ enable_pcie_vreg(true);
+
arch_cpu_init();
init_uart_clk(0);
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c
index 7d9dbcb6b0..b9e390003c 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -17,6 +17,7 @@
#include <env.h>
#include <errno.h>
#include <linux/libfdt.h>
+#include <linux/bitops.h>
#include <mmc.h>
#include <power-domain.h>
@@ -44,11 +45,22 @@ DECLARE_GLOBAL_DATA_PTR;
(SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT) | \
(SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT))
+#define TDX_USER_FUSE_BLOCK1_A 276
+#define TDX_USER_FUSE_BLOCK1_B 277
+#define TDX_USER_FUSE_BLOCK2_A 278
+#define TDX_USER_FUSE_BLOCK2_B 279
+
typedef enum {
PCB_VERSION_1_0,
PCB_VERSION_1_1
} pcb_rev_t;
+struct tdx_user_fuses {
+ uint16_t pid4;
+ uint16_t vers;
+ uint8_t ramid;
+};
+
static iomux_cfg_t pcb_vers_detect[] = {
SC_P_MIPI_DSI0_GPIO0_00 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT),
SC_P_MIPI_DSI0_GPIO0_01 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(PCB_VERS_DETECT),
@@ -69,12 +81,54 @@ static void setup_iomux_uart(void)
imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
}
+static uint32_t do_get_tdx_user_fuse(int a, int b)
+{
+ sc_err_t sciErr;
+ uint32_t val_a = 0;
+ uint32_t val_b = 0;
+
+ sciErr = sc_misc_otp_fuse_read(-1, a, &val_a);
+ if (sciErr != SC_ERR_NONE) {
+ printf("Error reading out user fuse %d\n", a);
+ return 0;
+ }
+
+ sciErr = sc_misc_otp_fuse_read(-1, b, &val_b);
+ if (sciErr != SC_ERR_NONE) {
+ printf("Error reading out user fuse %d\n", b);
+ return 0;
+ }
+
+ return ((val_a & 0xffff) << 16) | (val_b & 0xffff);
+}
+
+static void get_tdx_user_fuse(struct tdx_user_fuses* tdxuserfuse)
+{
+ uint32_t fuse_block;
+
+ fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK2_A,
+ TDX_USER_FUSE_BLOCK2_B);
+
+ /*
+ * Fuse block 2 acts as a backup area, if this reads 0 we want to
+ * use fuse block 1
+ */
+ if (fuse_block == 0)
+ fuse_block = do_get_tdx_user_fuse(TDX_USER_FUSE_BLOCK1_A,
+ TDX_USER_FUSE_BLOCK1_B);
+
+ tdxuserfuse->pid4 = (fuse_block >> 18) & GENMASK(13, 0);
+ tdxuserfuse->vers = (fuse_block >> 4) & GENMASK(13, 0);
+ tdxuserfuse->ramid = fuse_block & GENMASK(3, 0);
+}
+
void board_mem_get_layout(uint64_t *phys_sdram_1_start,
uint64_t *phys_sdram_1_size,
uint64_t *phys_sdram_2_start,
uint64_t *phys_sdram_2_size)
{
uint32_t is_quadplus = 0, val = 0;
+ struct tdx_user_fuses tdxramfuses;
sc_err_t sciErr = sc_misc_otp_fuse_read(-1, 6, &val);
if (sciErr == SC_ERR_NONE) {
@@ -82,14 +136,33 @@ void board_mem_get_layout(uint64_t *phys_sdram_1_start,
is_quadplus = ((val >> 4) & 0x3) != 0x0;
}
+ get_tdx_user_fuse(&tdxramfuses);
+
*phys_sdram_1_start = PHYS_SDRAM_1;
*phys_sdram_1_size = PHYS_SDRAM_1_SIZE;
*phys_sdram_2_start = PHYS_SDRAM_2;
- if (is_quadplus)
- /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */
+
+ switch (tdxramfuses.ramid) {
+ case 1:
+ *phys_sdram_2_size = SZ_2G;
+ break;
+ case 2:
*phys_sdram_2_size = 0x0UL;
- else
- *phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
+ break;
+ case 3:
+ *phys_sdram_2_size = SZ_2G;
+ break;
+ case 4:
+ *phys_sdram_2_size = SZ_4G + SZ_2G;
+ break;
+ default:
+ if (is_quadplus)
+ /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */
+ *phys_sdram_2_size = 0x0UL;
+ else
+ *phys_sdram_2_size = PHYS_SDRAM_2_SIZE;
+ break;
+ }
}
int board_early_init_f(void)
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 685d2ec786..3e6e204951 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -148,6 +148,12 @@ const char * const toradex_modules[] = {
[64] = "Verdin iMX8M Plus Quad 2GB Wi-Fi / BT IT",
[65] = "Verdin iMX8M Plus QuadLite 1GB IT",
[66] = "Verdin iMX8M Plus Quad 8GB Wi-Fi / BT",
+ [67] = "Apalis iMX8 QuadMax 8GB Wi-Fi / BT IT",
+ [68] = "Verdin iMX8M Mini Quad 2GB WB IT No CAN",
+ [69] = "UNKNOWN MODULE",
+ [70] = "Verdin iMX8M Plus Quad 8GB WB IT",
+ [86] = "Verdin iMX8M Mini DualLite 2GB IT",
+ [87] = "Verdin iMX8M Mini Quad 2GB IT",
};
const char * const toradex_carrier_boards[] = {
@@ -162,6 +168,42 @@ const char * const toradex_display_adapters[] = {
[159] = "Verdin DSI to LVDS Adapter",
};
+const u32 toradex_ouis[] = {
+ [0] = 0x00142dUL,
+ [1] = 0x8c06cbUL,
+};
+
+static u32 get_serial_from_mac(struct toradex_eth_addr *eth_addr)
+{
+ int i;
+ u32 oui = ntohl(eth_addr->oui) >> 8;
+ u32 nic = ntohl(eth_addr->nic) >> 8;
+
+ for (i = 0; i < ARRAY_SIZE(toradex_ouis); i++) {
+ if (toradex_ouis[i] == oui)
+ break;
+ }
+
+ return (u32)((i << 24) + nic);
+}
+
+void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr)
+{
+ u8 oui_index = tdx_serial >> 24;
+ u32 nic = tdx_serial & GENMASK(23, 0);
+ u32 oui;
+
+ if (oui_index >= ARRAY_SIZE(toradex_ouis)) {
+ puts("Can't find OUI for this serial#\n");
+ oui_index = 0;
+ }
+
+ oui = toradex_ouis[oui_index];
+
+ eth_addr->oui = htonl(oui << 8);
+ eth_addr->nic = htonl(nic << 8);
+}
+
#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC
static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
{
@@ -334,8 +376,7 @@ int read_tdx_cfg_block(void)
memcpy(&tdx_eth_addr, config_block + offset,
6);
- /* NIC part of MAC address is serial number */
- tdx_serial = ntohl(tdx_eth_addr.nic) >> 8;
+ tdx_serial = get_serial_from_mac(&tdx_eth_addr);
break;
case TAG_HW:
memcpy(&tdx_hw_tag, config_block + offset, 8);
@@ -357,13 +398,28 @@ out:
return ret;
}
+static int parse_assembly_string(char *string_to_parse, u16 *assembly)
+{
+ if (string_to_parse[3] >= 'A' && string_to_parse[3] <= 'Z')
+ *assembly = string_to_parse[3] - 'A';
+ else if (string_to_parse[3] == '#')
+ *assembly = simple_strtoul(&string_to_parse[4], NULL, 10);
+ else
+ return -EINVAL;
+
+ return 0;
+}
+
static int get_cfgblock_interactive(void)
{
char message[CONFIG_SYS_CBSIZE];
char *soc;
char it = 'n';
char wb = 'n';
+ char mem8g = 'n';
+ char can = 'y';
int len = 0;
+ int ret = 0;
/* Unknown module by default */
tdx_hw_tag.prodid = 0;
@@ -384,6 +440,21 @@ static int get_cfgblock_interactive(void)
sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] ");
len = cli_readline(message);
wb = console_buffer[0];
+
+#if defined(CONFIG_TARGET_APALIS_IMX8)
+ if ((wb == 'y' || wb == 'Y') && (it == 'y' || it == 'Y')) {
+ sprintf(message, "Does your module have 8GB of RAM? [y/N] ");
+ len = cli_readline(message);
+ mem8g = console_buffer[0];
+ }
+#endif
+#if defined(CONFIG_TARGET_VERDIN_IMX8MM)
+ if (is_cpu_type(MXC_CPU_IMX8MM) && (wb == 'y' || wb == 'Y')) {
+ sprintf(message, "Does your module have CAN? [y/N] ");
+ len = cli_readline(message);
+ can = console_buffer[0];
+ }
+#endif
#endif
soc = env_get("soc");
@@ -437,8 +508,12 @@ static int get_cfgblock_interactive(void)
tdx_hw_tag.prodid = COLIBRI_IMX7S;
else if (is_cpu_type(MXC_CPU_IMX8QM)) {
if (it == 'y' || it == 'Y') {
- if (wb == 'y' || wb == 'Y')
- tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT;
+ if (wb == 'y' || wb == 'Y') {
+ if (mem8g == 'y' || mem8g == 'Y')
+ tdx_hw_tag.prodid = APALIS_IMX8QM_8GB_WIFI_BT_IT;
+ else
+ tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT;
+ }
else
tdx_hw_tag.prodid = APALIS_IMX8QM_IT;
} else {
@@ -467,7 +542,9 @@ static int get_cfgblock_interactive(void)
else
tdx_hw_tag.prodid = VERDIN_IMX8MMDL;
} else if (is_cpu_type(MXC_CPU_IMX8MM)) {
- if (wb == 'y' || wb == 'Y')
+ if (can == 'n' || can == 'N')
+ tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN;
+ else if (wb == 'y' || wb == 'Y')
tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT;
else
tdx_hw_tag.prodid = VERDIN_IMX8MMQ_IT;
@@ -480,7 +557,10 @@ static int get_cfgblock_interactive(void)
if (gd->ram_size == 0x80000000)
tdx_hw_tag.prodid = VERDIN_IMX8MPQ_2GB_WIFI_BT_IT;
else if (gd->ram_size == 0x200000000)
- tdx_hw_tag.prodid = VERDIN_IMX8MPQ_8GB_WIFI_BT;
+ if (it == 'y' || it == 'Y')
+ tdx_hw_tag.prodid = VERDIN_IMX8MPQ_8GB_WIFI_BT_IT;
+ else
+ tdx_hw_tag.prodid = VERDIN_IMX8MPQ_8GB_WIFI_BT;
else
tdx_hw_tag.prodid = VERDIN_IMX8MPQ_WIFI_BT_IT;
else
@@ -543,13 +623,18 @@ static int get_cfgblock_interactive(void)
}
while (len < 4) {
- sprintf(message, "Enter the module version (e.g. V1.1B): V");
+ sprintf(message, "Enter the module version (e.g. V1.1B or V1.1#26): V");
len = cli_readline(message);
}
tdx_hw_tag.ver_major = console_buffer[0] - '0';
tdx_hw_tag.ver_minor = console_buffer[2] - '0';
- tdx_hw_tag.ver_assembly = console_buffer[3] - 'A';
+
+ ret = parse_assembly_string(console_buffer, &tdx_hw_tag.ver_assembly);
+ if (ret) {
+ printf("Parsing module version failed\n");
+ return ret;
+ }
if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1)
tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ -
@@ -756,6 +841,7 @@ static int get_cfgblock_carrier_interactive(void)
{
char message[CONFIG_SYS_CBSIZE];
int len;
+ int ret = 0;
printf("Supported carrier boards:\n");
printf("CARRIER BOARD NAME\t\t [ID]\n");
@@ -769,13 +855,18 @@ static int get_cfgblock_carrier_interactive(void)
tdx_car_hw_tag.prodid = simple_strtoul(console_buffer, NULL, 10);
do {
- sprintf(message, "Enter carrier board version (e.g. V1.1B): V");
+ sprintf(message, "Enter carrier board version (e.g. V1.1B or V1.1#26): V");
len = cli_readline(message);
} while (len < 4);
tdx_car_hw_tag.ver_major = console_buffer[0] - '0';
tdx_car_hw_tag.ver_minor = console_buffer[2] - '0';
- tdx_car_hw_tag.ver_assembly = console_buffer[3] - 'A';
+
+ ret = parse_assembly_string(console_buffer, &tdx_car_hw_tag.ver_assembly);
+ if (ret) {
+ printf("Parsing module version failed\n");
+ return ret;
+ }
while (len < 8) {
sprintf(message, "Enter carrier board serial number: ");
@@ -952,8 +1043,7 @@ static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc,
}
/* Convert serial number to MAC address (the storage format) */
- tdx_eth_addr.oui = htonl(0x00142dUL << 8);
- tdx_eth_addr.nic = htonl(tdx_serial << 8);
+ get_mac_from_serial(tdx_serial, &tdx_eth_addr);
/* Valid Tag */
write_tag(config_block, &offset, TAG_VALID, NULL, 0);
diff --git a/board/toradex/common/tdx-cfg-block.h b/board/toradex/common/tdx-cfg-block.h
index ddcf699748..cccf8a14b6 100644
--- a/board/toradex/common/tdx-cfg-block.h
+++ b/board/toradex/common/tdx-cfg-block.h
@@ -87,6 +87,13 @@ enum {
VERDIN_IMX8MPQ_2GB_WIFI_BT_IT,
VERDIN_IMX8MPQL_IT, /* 65 */
VERDIN_IMX8MPQ_8GB_WIFI_BT,
+ APALIS_IMX8QM_8GB_WIFI_BT_IT,
+ VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN,
+ /* 69 */
+ VERDIN_IMX8MPQ_8GB_WIFI_BT_IT = 70,
+ /* 71-85 */
+ VERDIN_IMX8MMDL_2G_IT = 86,
+ VERDIN_IMX8MMQ_2G_IT_NO_CAN,
};
enum {
@@ -113,4 +120,6 @@ int read_tdx_cfg_block_carrier(void);
int try_migrate_tdx_cfg_block_carrier(void);
+void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr);
+
#endif /* _TDX_CFG_BLOCK_H */
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index d9edffd79a..eaa2622924 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -12,15 +12,17 @@
#include <asm/setup.h>
#include "tdx-common.h"
-#define TORADEX_OUI 0x00142dUL
+#define SERIAL_STR_LEN 8
+#define MODULE_VER_STR_LEN 4 // V1.1
+#define MODULE_REV_STR_LEN 3 // [A-Z] or #[26-99]
#ifdef CONFIG_TDX_CFG_BLOCK
-static char tdx_serial_str[9];
-static char tdx_board_rev_str[6];
+static char tdx_serial_str[SERIAL_STR_LEN + 1];
+static char tdx_board_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1];
#ifdef CONFIG_TDX_CFG_BLOCK_EXTRA
-static char tdx_car_serial_str[9];
-static char tdx_car_rev_str[6];
+static char tdx_car_serial_str[SERIAL_STR_LEN + 1];
+static char tdx_car_rev_str[MODULE_VER_STR_LEN + MODULE_REV_STR_LEN + 1];
static char *tdx_carrier_board_name;
#endif
@@ -71,21 +73,37 @@ void get_board_serial(struct tag_serialnr *serialnr)
}
#endif /* CONFIG_SERIAL_TAG */
+static const char *get_board_assembly(u16 ver_assembly)
+{
+ static char ver_name[MODULE_REV_STR_LEN + 1];
+
+ if (ver_assembly < 26) {
+ ver_name[0] = (char)ver_assembly + 'A';
+ ver_name[1] = '\0';
+ } else {
+ snprintf(ver_name, sizeof(ver_name),
+ "#%u", ver_assembly);
+ }
+
+ return ver_name;
+}
+
int show_board_info(void)
{
unsigned char ethaddr[6];
if (read_tdx_cfg_block()) {
printf("MISSING TORADEX CONFIG BLOCK\n");
- tdx_eth_addr.oui = htonl(TORADEX_OUI << 8);
- tdx_eth_addr.nic = htonl(tdx_serial << 8);
+ get_mac_from_serial(tdx_serial, &tdx_eth_addr);
checkboard();
} else {
- sprintf(tdx_serial_str, "%08u", tdx_serial);
- sprintf(tdx_board_rev_str, "V%1d.%1d%c",
- tdx_hw_tag.ver_major,
- tdx_hw_tag.ver_minor,
- (char)tdx_hw_tag.ver_assembly + 'A');
+ snprintf(tdx_serial_str, sizeof(tdx_serial_str),
+ "%08u", tdx_serial);
+ snprintf(tdx_board_rev_str, sizeof(tdx_board_rev_str),
+ "V%1d.%1d%s",
+ tdx_hw_tag.ver_major,
+ tdx_hw_tag.ver_minor,
+ get_board_assembly(tdx_hw_tag.ver_assembly));
env_set("serial#", tdx_serial_str);
@@ -101,12 +119,13 @@ int show_board_info(void)
tdx_carrier_board_name = (char *)
toradex_carrier_boards[tdx_car_hw_tag.prodid];
- sprintf(tdx_car_serial_str, "%08u", tdx_car_serial);
- sprintf(tdx_car_rev_str, "V%1d.%1d%c",
- tdx_car_hw_tag.ver_major,
- tdx_car_hw_tag.ver_minor,
- (char)tdx_car_hw_tag.ver_assembly +
- 'A');
+ snprintf(tdx_car_serial_str, sizeof(tdx_car_serial_str),
+ "%08u", tdx_car_serial);
+ snprintf(tdx_car_rev_str, sizeof(tdx_car_rev_str),
+ "V%1d.%1d%s",
+ tdx_car_hw_tag.ver_major,
+ tdx_car_hw_tag.ver_minor,
+ get_board_assembly(tdx_car_hw_tag.ver_assembly));
env_set("carrier_serial#", tdx_car_serial_str);
printf("Carrier: Toradex %s %s, Serial# %s\n",
@@ -162,7 +181,7 @@ int ft_common_board_setup(void *blob, bd_t *bd)
if (tdx_hw_tag.ver_major) {
char prod_id[5];
- sprintf(prod_id, "%04u", tdx_hw_tag.prodid);
+ snprintf(prod_id, sizeof(prod_id), "%04u", tdx_hw_tag.prodid);
fdt_setprop(blob, 0, "toradex,product-id", prod_id, 5);
fdt_setprop(blob, 0, "toradex,board-rev", tdx_board_rev_str,
diff --git a/board/toradex/verdin-imx8mm/lpddr4_timing.c b/board/toradex/verdin-imx8mm/lpddr4_timing.c
index d114abf9d6..4dfec679b1 100644
--- a/board/toradex/verdin-imx8mm/lpddr4_timing.c
+++ b/board/toradex/verdin-imx8mm/lpddr4_timing.c
@@ -1,12 +1,11 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2020 Toradex
+ * Copyright 2023 Toradex
*
* Generated code from MX8M_DDR_tool
- * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga
*
- * DDR calibration created with mscale_ddr_tool_v210_setup.exe using
- * MX8M_Mini_LPDDR4_RPA_v14 Verdin iMX8MM V1.0.xlsx as of 1. Nov. 2019.
+ * DDR calibration created with mscale_ddr_tool_v3.31_setup.exe using
+ * MX8M_Mini_LPDDR4_RPA_v22 Verdin iMX8MM V1.0.xlsx as of 7. Aug. 2023.
*/
#include <linux/kernel.h>
@@ -17,22 +16,22 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d400304, 0x1},
{0x3d400030, 0x1},
{0x3d400000, 0xa1080020},
- {0x3d400020, 0x203},
+ {0x3d400020, 0x202},
{0x3d400024, 0x3a980},
- {0x3d400064, 0x5b00d2},
+ {0x3d400064, 0x2d00d2},
{0x3d4000d0, 0xc00305ba},
{0x3d4000d4, 0x940000},
{0x3d4000dc, 0xd4002d},
{0x3d4000e0, 0x310000},
{0x3d4000e8, 0x66004d},
{0x3d4000ec, 0x16004d},
- {0x3d400100, 0x191e1920},
+ {0x3d400100, 0x191e0c20},
{0x3d400104, 0x60630},
{0x3d40010c, 0xb0b000},
{0x3d400110, 0xe04080e},
{0x3d400114, 0x2040c0c},
{0x3d400118, 0x1010007},
- {0x3d40011c, 0x401},
+ {0x3d40011c, 0x402},
{0x3d400130, 0x20600},
{0x3d400134, 0xc100002},
{0x3d400138, 0xd8},
@@ -49,7 +48,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d4001b0, 0x11},
{0x3d4001c0, 0x1},
{0x3d4001c4, 0x1},
- {0x3d4000f4, 0xc99},
+ {0x3d4000f4, 0x699},
{0x3d400108, 0x70e1617},
{0x3d400200, 0x1f},
{0x3d40020c, 0x0},
@@ -57,6 +56,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d400204, 0x80808},
{0x3d400214, 0x7070707},
{0x3d400218, 0x7070707},
+ {0x3d40021c, 0xf0f},
{0x3d400250, 0x29001701},
{0x3d400254, 0x2c},
{0x3d40025c, 0x4000030},
@@ -68,22 +68,22 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d400498, 0x620096},
{0x3d40049c, 0x1100e07},
{0x3d4004a0, 0xc8012c},
- {0x3d402020, 0x1},
+ {0x3d402020, 0x0},
{0x3d402024, 0x7d00},
{0x3d402050, 0x20d040},
- {0x3d402064, 0xc001c},
+ {0x3d402064, 0x6001c},
{0x3d4020dc, 0x840000},
{0x3d4020e0, 0x310000},
{0x3d4020e8, 0x66004d},
{0x3d4020ec, 0x16004d},
- {0x3d402100, 0xa040305},
+ {0x3d402100, 0xa040105},
{0x3d402104, 0x30407},
{0x3d402108, 0x203060b},
{0x3d40210c, 0x505000},
{0x3d402110, 0x2040202},
{0x3d402114, 0x2030202},
{0x3d402118, 0x1010004},
- {0x3d40211c, 0x301},
+ {0x3d40211c, 0x302},
{0x3d402130, 0x20300},
{0x3d402134, 0xa100002},
{0x3d402138, 0x1d},
@@ -92,8 +92,8 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d402190, 0x3818200},
{0x3d402194, 0x80303},
{0x3d4021b4, 0x100},
- {0x3d4020f4, 0xc99},
- {0x3d403020, 0x1},
+ {0x3d4020f4, 0x599},
+ {0x3d403020, 0x0},
{0x3d403024, 0x1f40},
{0x3d403050, 0x20d040},
{0x3d403064, 0x30007},
@@ -108,7 +108,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d403110, 0x2040202},
{0x3d403114, 0x2030202},
{0x3d403118, 0x1010004},
- {0x3d40311c, 0x301},
+ {0x3d40311c, 0x302},
{0x3d403130, 0x20300},
{0x3d403134, 0xa100002},
{0x3d403138, 0x8},
@@ -117,7 +117,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{0x3d403190, 0x3818200},
{0x3d403194, 0x80303},
{0x3d4031b4, 0x100},
- {0x3d4030f4, 0xc99},
+ {0x3d4030f4, 0x599},
{0x3d400028, 0x0},
};
@@ -205,8 +205,8 @@ struct dram_cfg_param ddr_ddrphy_cfg[] = {
{0x220024, 0x1ab},
{0x2003a, 0x0},
{0x20056, 0x3},
- {0x120056, 0xa},
- {0x220056, 0xa},
+ {0x120056, 0x3},
+ {0x220056, 0x3},
{0x1004d, 0xe00},
{0x1014d, 0xe00},
{0x1104d, 0xe00},
@@ -1058,7 +1058,6 @@ struct dram_cfg_param ddr_fsp0_cfg[] = {
{0x54008, 0x131f},
{0x54009, 0xc8},
{0x5400b, 0x2},
- {0x5400d, 0x100},
{0x54012, 0x110},
{0x54019, 0x2dd4},
{0x5401a, 0x31},
@@ -1098,7 +1097,6 @@ struct dram_cfg_param ddr_fsp1_cfg[] = {
{0x54008, 0x121f},
{0x54009, 0xc8},
{0x5400b, 0x2},
- {0x5400d, 0x100},
{0x54012, 0x110},
{0x54019, 0x84},
{0x5401a, 0x31},
@@ -1138,7 +1136,6 @@ struct dram_cfg_param ddr_fsp2_cfg[] = {
{0x54008, 0x121f},
{0x54009, 0xc8},
{0x5400b, 0x2},
- {0x5400d, 0x100},
{0x54012, 0x110},
{0x54019, 0x84},
{0x5401a, 0x31},
@@ -1204,7 +1201,7 @@ struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
{0x5403b, 0x4d},
{0x5403c, 0x4d},
{0x5403d, 0x1600},
- { 0xd0000, 0x1 },
+ {0xd0000, 0x1},
};
/* DRAM PHY init engine image */
@@ -1697,15 +1694,15 @@ struct dram_cfg_param ddr_phy_pie[] = {
{0x400d6, 0x20a},
{0x400d7, 0x20b},
{0x2003a, 0x2},
- {0x2000b, 0x5d},
+ {0x2000b, 0x34b},
{0x2000c, 0xbb},
{0x2000d, 0x753},
{0x2000e, 0x2c},
- {0x12000b, 0xc},
+ {0x12000b, 0x70},
{0x12000c, 0x19},
{0x12000d, 0xfa},
{0x12000e, 0x10},
- {0x22000b, 0x3},
+ {0x22000b, 0x1c},
{0x22000c, 0x6},
{0x22000d, 0x3e},
{0x22000e, 0x10},
@@ -1846,5 +1843,5 @@ struct dram_timing_info dram_timing = {
.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
.ddrphy_pie = ddr_phy_pie,
.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
- .fsp_table = { 3000, 400, 100, },
+ .fsp_table = {3000, 400, 100,},
};
diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
index 649b6bff4d..cb9b0eec65 100644
--- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c
+++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
@@ -392,7 +392,8 @@ static void select_dt_from_module_version(void)
* Wi-Fi/Bluetooth make sure we use the -wifi device tree.
*/
is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT) ||
- (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT);
+ (tdx_hw_tag.prodid == VERDIN_IMX8MMDL_WIFI_BT_IT) ||
+ (tdx_hw_tag.prodid == VERDIN_IMX8MMQ_WIFI_BT_IT_NO_CAN);
#endif
switch(get_pcb_revision()) {
diff --git a/board/toradex/verdin-imx8mp/lpddr4_timing.c b/board/toradex/verdin-imx8mp/lpddr4_timing.c
index 4bccd800ff..39fcccfb41 100644
--- a/board/toradex/verdin-imx8mp/lpddr4_timing.c
+++ b/board/toradex/verdin-imx8mp/lpddr4_timing.c
@@ -21,9 +21,9 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d400000, 0xa3080020 },
{ 0x3d400020, 0x1303 },
{ 0x3d400024, 0x1e84800 },
- { 0x3d400064, 0x7a0118 },
- { 0x3d400070, 0x61027f10 },
- { 0x3d400074, 0x7b0 },
+ { 0x3d400064, 0x7a017c },
+ { 0x3d400070, 0x7027f90 },
+ { 0x3d400074, 0x790 },
{ 0x3d4000d0, 0xc00307a3 },
{ 0x3d4000d4, 0xc50000 },
{ 0x3d4000dc, 0xf4003f },
@@ -31,15 +31,15 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d4000e8, 0x660048 },
{ 0x3d4000ec, 0x160048 },
{ 0x3d400100, 0x2028222a },
- { 0x3d400104, 0x807bf },
+ { 0x3d400104, 0x8083f },
{ 0x3d40010c, 0xe0e000 },
{ 0x3d400110, 0x12040a12 },
{ 0x3d400114, 0x2050f0f },
{ 0x3d400118, 0x1010009 },
- { 0x3d40011c, 0x501 },
+ { 0x3d40011c, 0x502 },
{ 0x3d400130, 0x20800 },
{ 0x3d400134, 0xe100002 },
- { 0x3d400138, 0x120 },
+ { 0x3d400138, 0x184 },
{ 0x3d400144, 0xc80064 },
{ 0x3d400180, 0x3e8001e },
{ 0x3d400184, 0x3207a12 },
@@ -53,15 +53,16 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d4001b0, 0x11 },
{ 0x3d4001c0, 0x1 },
{ 0x3d4001c4, 0x1 },
- { 0x3d4000f4, 0xc99 },
- { 0x3d400108, 0x9121c1c },
- { 0x3d400200, 0x18 },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x9121b1c },
+ { 0x3d400200, 0x17 },
+ { 0x3d400208, 0x0 },
{ 0x3d40020c, 0x0 },
{ 0x3d400210, 0x1f1f },
{ 0x3d400204, 0x80808 },
{ 0x3d400214, 0x7070707 },
{ 0x3d400218, 0x7070707 },
- { 0x3d40021c, 0xf07 },
+ { 0x3d40021c, 0xf08 },
{ 0x3d400250, 0x1705 },
{ 0x3d400254, 0x2c },
{ 0x3d40025c, 0x4000030 },
@@ -77,7 +78,7 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d402020, 0x1001 },
{ 0x3d402024, 0x30d400 },
{ 0x3d402050, 0x20d000 },
- { 0x3d402064, 0xc001c },
+ { 0x3d402064, 0xc0026 },
{ 0x3d4020dc, 0x840000 },
{ 0x3d4020e0, 0x330000 },
{ 0x3d4020e8, 0x660048 },
@@ -89,20 +90,20 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d402110, 0x2040202 },
{ 0x3d402114, 0x2030202 },
{ 0x3d402118, 0x1010004 },
- { 0x3d40211c, 0x301 },
+ { 0x3d40211c, 0x302 },
{ 0x3d402130, 0x20300 },
{ 0x3d402134, 0xa100002 },
- { 0x3d402138, 0x1d },
+ { 0x3d402138, 0x27 },
{ 0x3d402144, 0x14000a },
{ 0x3d402180, 0x640004 },
{ 0x3d402190, 0x3818200 },
{ 0x3d402194, 0x80303 },
{ 0x3d4021b4, 0x100 },
- { 0x3d4020f4, 0xc99 },
+ { 0x3d4020f4, 0x599 },
{ 0x3d403020, 0x1001 },
{ 0x3d403024, 0xc3500 },
{ 0x3d403050, 0x20d000 },
- { 0x3d403064, 0x30007 },
+ { 0x3d403064, 0x3000a },
{ 0x3d4030dc, 0x840000 },
{ 0x3d4030e0, 0x330000 },
{ 0x3d4030e8, 0x660048 },
@@ -114,16 +115,16 @@ struct dram_cfg_param ddr_ddrc_cfg[] = {
{ 0x3d403110, 0x2040202 },
{ 0x3d403114, 0x2030202 },
{ 0x3d403118, 0x1010004 },
- { 0x3d40311c, 0x301 },
+ { 0x3d40311c, 0x302 },
{ 0x3d403130, 0x20300 },
{ 0x3d403134, 0xa100002 },
- { 0x3d403138, 0x8 },
+ { 0x3d403138, 0xa },
{ 0x3d403144, 0x50003 },
{ 0x3d403180, 0x190004 },
{ 0x3d403190, 0x3818200 },
{ 0x3d403194, 0x80303 },
{ 0x3d4031b4, 0x100 },
- { 0x3d4030f4, 0xc99 },
+ { 0x3d4030f4, 0x599 },
{ 0x3d400028, 0x0 },
};
@@ -1702,15 +1703,15 @@ struct dram_cfg_param ddr_phy_pie[] = {
{ 0x400d7, 0x20b },
{ 0x2003a, 0x2 },
{ 0x200be, 0x3 },
- { 0x2000b, 0x7d },
+ { 0x2000b, 0x465 },
{ 0x2000c, 0xfa },
{ 0x2000d, 0x9c4 },
{ 0x2000e, 0x2c },
- { 0x12000b, 0xc },
+ { 0x12000b, 0x70 },
{ 0x12000c, 0x19 },
{ 0x12000d, 0xfa },
{ 0x12000e, 0x10 },
- { 0x22000b, 0x3 },
+ { 0x22000b, 0x1c },
{ 0x22000c, 0x6 },
{ 0x22000d, 0x3e },
{ 0x22000e, 0x10 },
@@ -1843,9 +1844,9 @@ struct dram_cfg_param ddr_ddrc_cfg2[] = {
{ 0x3d400000, 0xa1080020 },
{ 0x3d400020, 0x1303 },
{ 0x3d400024, 0x1e84800 },
- { 0x3d400064, 0x7a0118 },
- { 0x3d400070, 0x61027f10 },
- { 0x3d400074, 0x7b0 },
+ { 0x3d400064, 0x7a017c },
+ { 0x3d400070, 0x7027f90 },
+ { 0x3d400074, 0x790 },
{ 0x3d4000d0, 0xc00307a3 },
{ 0x3d4000d4, 0xc50000 },
{ 0x3d4000dc, 0xf4003f },
@@ -1853,15 +1854,15 @@ struct dram_cfg_param ddr_ddrc_cfg2[] = {
{ 0x3d4000e8, 0x660048 },
{ 0x3d4000ec, 0x160048 },
{ 0x3d400100, 0x2028222a },
- { 0x3d400104, 0x807bf },
+ { 0x3d400104, 0x8083f },
{ 0x3d40010c, 0xe0e000 },
{ 0x3d400110, 0x12040a12 },
{ 0x3d400114, 0x2050f0f },
{ 0x3d400118, 0x1010009 },
- { 0x3d40011c, 0x501 },
+ { 0x3d40011c, 0x502 },
{ 0x3d400130, 0x20800 },
{ 0x3d400134, 0xe100002 },
- { 0x3d400138, 0x120 },
+ { 0x3d400138, 0x184 },
{ 0x3d400144, 0xc80064 },
{ 0x3d400180, 0x3e8001e },
{ 0x3d400184, 0x3207a12 },
@@ -1875,9 +1876,10 @@ struct dram_cfg_param ddr_ddrc_cfg2[] = {
{ 0x3d4001b0, 0x11 },
{ 0x3d4001c0, 0x1 },
{ 0x3d4001c4, 0x1 },
- { 0x3d4000f4, 0xc99 },
- { 0x3d400108, 0x9121c1c },
+ { 0x3d4000f4, 0x799 },
+ { 0x3d400108, 0x9121b1c },
{ 0x3d400200, 0x1f },
+ { 0x3d400208, 0x0 },
{ 0x3d40020c, 0x0 },
{ 0x3d400210, 0x1f1f },
{ 0x3d400204, 0x80808 },
@@ -1899,7 +1901,7 @@ struct dram_cfg_param ddr_ddrc_cfg2[] = {
{ 0x3d402020, 0x1001 },
{ 0x3d402024, 0x30d400 },
{ 0x3d402050, 0x20d000 },
- { 0x3d402064, 0xc001c },
+ { 0x3d402064, 0xc0026 },
{ 0x3d4020dc, 0x840000 },
{ 0x3d4020e0, 0x330000 },
{ 0x3d4020e8, 0x660048 },
@@ -1911,20 +1913,20 @@ struct dram_cfg_param ddr_ddrc_cfg2[] = {
{ 0x3d402110, 0x2040202 },
{ 0x3d402114, 0x2030202 },
{ 0x3d402118, 0x1010004 },
- { 0x3d40211c, 0x301 },
+ { 0x3d40211c, 0x302 },
{ 0x3d402130, 0x20300 },
{ 0x3d402134, 0xa100002 },
- { 0x3d402138, 0x1d },
+ { 0x3d402138, 0x27 },
{ 0x3d402144, 0x14000a },
{ 0x3d402180, 0x640004 },
{ 0x3d402190, 0x3818200 },
{ 0x3d402194, 0x80303 },
{ 0x3d4021b4, 0x100 },
- { 0x3d4020f4, 0xc99 },
+ { 0x3d4020f4, 0x599 },
{ 0x3d403020, 0x1001 },
{ 0x3d403024, 0xc3500 },
{ 0x3d403050, 0x20d000 },
- { 0x3d403064, 0x30007 },
+ { 0x3d403064, 0x3000a },
{ 0x3d4030dc, 0x840000 },
{ 0x3d4030e0, 0x330000 },
{ 0x3d4030e8, 0x660048 },
@@ -1936,16 +1938,16 @@ struct dram_cfg_param ddr_ddrc_cfg2[] = {
{ 0x3d403110, 0x2040202 },
{ 0x3d403114, 0x2030202 },
{ 0x3d403118, 0x1010004 },
- { 0x3d40311c, 0x301 },
+ { 0x3d40311c, 0x302 },
{ 0x3d403130, 0x20300 },
{ 0x3d403134, 0xa100002 },
- { 0x3d403138, 0x8 },
+ { 0x3d403138, 0xa },
{ 0x3d403144, 0x50003 },
{ 0x3d403180, 0x190004 },
{ 0x3d403190, 0x3818200 },
{ 0x3d403194, 0x80303 },
{ 0x3d4031b4, 0x100 },
- { 0x3d4030f4, 0xc99 },
+ { 0x3d4030f4, 0x599 },
{ 0x3d400028, 0x0 },
};
@@ -2081,7 +2083,6 @@ struct dram_cfg_param ddr_fsp0_2d_cfg2[] = {
{ 0x54008, 0x61 },
{ 0x54009, 0xc8 },
{ 0x5400b, 0x2 },
- { 0x5400d, 0x100 },
{ 0x5400f, 0x100 },
{ 0x54010, 0x1f7f },
{ 0x54012, 0x110 },
diff --git a/board/toradex/verdin-imx8mp/spl.c b/board/toradex/verdin-imx8mp/spl.c
index 3257431ed1..db2e88a095 100644
--- a/board/toradex/verdin-imx8mp/spl.c
+++ b/board/toradex/verdin-imx8mp/spl.c
@@ -55,11 +55,10 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
void spl_dram_init(void)
{
/*
- * try configuring for quad die, dual rank aka 8 GB falling back to
- * dual die, single rank aka 1 GB (untested), 2 GB or 4 GB if it fails
+ * Try configuring for dual rank memory falling back to single rank
*/
if (ddr_init(&dram_timing)) {
- printf("Quad die, dual rank failed, attempting dual die, single rank configuration.\n");
+ printf("Dual rank failed, attempting single rank configuration.\n");
ddr_init(&dram_timing2);
}
}
diff --git a/board/toradex/verdin-imx8mp/verdin-imx8mp.c b/board/toradex/verdin-imx8mp/verdin-imx8mp.c
index 44b9d82962..cdc28341ce 100644
--- a/board/toradex/verdin-imx8mp/verdin-imx8mp.c
+++ b/board/toradex/verdin-imx8mp/verdin-imx8mp.c
@@ -345,7 +345,8 @@ static void select_dt_from_module_version(void)
*/
is_wifi = (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_WIFI_BT_IT) ||
(tdx_hw_tag.prodid == VERDIN_IMX8MPQ_2GB_WIFI_BT_IT) ||
- (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT);
+ (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT) ||
+ (tdx_hw_tag.prodid == VERDIN_IMX8MPQ_8GB_WIFI_BT_IT);
#endif
if (is_wifi)
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-21 02:13:33 +0000