Age | Commit message (Collapse) | Author |
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Add different defconfigs.
Enable Trustzone.
Update env to runtime boot OP-TEE.
mx7d arm2 board not supported now.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add different defconfigs.
Enable Trustzone.
Update env to runtime boot OP-TEE.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add different defconfigs.
Enable Trustzone.
Update env to runtime boot OP-TEE.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add different defconfigs
Enable Trustzone.
Update env to runtime boot OP-TEE.
To 6QP SDB, TZASC enabled, need board rework and new ddr script.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add defconfigs.
Enable Trustzone.
Update env to runtime boot OP-TEE.
To 6QP AUTO, TZASC not enabled now.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add SET_BIT command
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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To i.MX6/7, the high 32M is reserved for OP-TEE case.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add IMX_OPTEE Kconfig entry
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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If TEE is enabled according to rom_pointer[0,1] passed to BL33
from ATF, uboot need to add the optee node in dts to let
Kernel could probe the TEE driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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considering the boot binary/kernel size becomes larger, increase the
boot and kernel partition size and accordingly change the offset when
reading data.
Also changed the extra Android misc partition size to 8M which is block
size aligned.
Signed-off-by: Han Xu <han.xu@nxp.com>
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Implement wdog reset in SPL stage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The warnings in f_fastboot.c is because the size of a pointer is 64bits,
while the variables in header structure is 32bits. Need to convert manually
at first.
The function partition_table_valid() is useful only when CONFIG_FSL_FASTBOOT and
CONFIG_FASTBOOT_LOCK are defined.
Change-Id: I480f254465096bd61b9075dff0d3fb6ab4bc44af
Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
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This build warning is because unnecessary conversion.
Change-Id: Icfad58b95b62c15021ff57370d73b644133f6697
Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
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This build error in arch/arm/cpu/armv7/mx6/soc.c is introduced by mistake.
Change-Id: Ieecdc359bcd5a2eb60db4d96bcf06f19e8b2959f
Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
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Pass the 'androidboot.verifiedbootstate' kernel cmdline according to
the requirement.
Change-Id: Idc87b769e502d7a5779565ddcb3b14b29d8c5487
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Add configs to open lock/unlock feature for evk_6sl and sabresd_7d.
Change-Id: I18f8917df06290efb553b10c9bbdaeb145f8a423
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Android needs to use USBOTG port on MEK base board for fastboot (USB device mode).
Add relevant node to DTS and update configurations to enable the port in android build.
Signed-off-by: Ye Li <ye.li@nxp.com>
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There are duplicated nodes for USBOTG1 and its PHY in imx8qxp DTSi,
remove them.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Correct SoC type, otherwise get wrong soc type and access wrong
registers.
If not correct, met kernel panic:
[ 0.000000] Bad mode in Error handler detected on CPU0, code 0xbf000002 -- Sr
[ 0.000000] Internal error: Oops - bad mode: 0 [#1] PREEMPT SMP
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 4.9.51-03585-gc9c62b70db7
[ 0.000000] Hardware name: Freescale i.MX8MQ EVK (DT)
[ 0.000000] task: ffff000009210700 task.stack: ffff000009200000
[ 0.000000] PC is at setup_arch+0xf4/0x550
[ 0.000000] LR is at setup_arch+0xf0/0x550
[ 0.000000] pc : [<ffff0000090f2714>] lr : [<ffff0000090f2710>] pstate: 00005
[ 0.000000] sp : ffff000009203f20
[ 0.000000] x29: ffff000009203f20 x28: 00000000410f0018
[ 0.000000] x27: 0000000000000400 x26: 00000000fff19b88
[ 0.000000] x25: 00000000ff93a0b0 x24: 00000000fff83358
[ 0.000000] x23: 0000000000000000 x22: ffff000009207000
[ 0.000000] x21: ffff7dfffe800000 x20: ffff000009224000
[ 0.000000] x19: ffff000008080000 x18: 0000000000000010
[ 0.000000] x17: 0000000000009000 x16: 0000000000001800
[ 0.000000] x15: 0000000000000006 x14: ffff00008933cbc7
[ 0.000000] x13: ffff00000933cbd5 x12: 0000000000000000
[ 0.000000] x11: 0000000000000007 x10: 0101010101010101
[ 0.000000] x9 : ffffffffffffffff x8 : 0000000000000008
[ 0.000000] x7 : 0000000000000007 x6 : 8000000000000000
[ 0.000000] x5 : 0000000000000080 x4 : 000000000000006e
[ 0.000000] x3 : 0000000000000000 x2 : 000000000000006e
[ 0.000000] x1 : 0000000000000000 x0 : 0000000000000001
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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u-boot hardly
The BSP patch "MLK-16467 serial_lpuart: Fix FIFO_RXFE definition in
LPUART driver" disable the FIFO. The UART can only reveive input after some
log output and console is ready. So it is very hard to stop at u-boot if
we set the bootdelay as 0s.
Change the bootdelay time to 1s to avoid stopping at u-boot hardly.
Change-Id: I7134f559b3d43b8f1064171e60fd0098b59358a9
Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
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Implement the get_cpu_rev function by reading the DIGPROG register
to get the CPU ID. Since this register is not updated for B0,
we need also check ROM version. The ROM version address is different
on B0 (0x83c) and A0 (0x800), so have to check both two.
Additional, the address for ROM_SW_INFO is changed on B0, we have to use
the CPU version to determine the address.
Signed-off-by: Ye Li <ye.li@nxp.com>
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When booting from flexspi, the mmcpart variable is not defined because
the CONFIG_SYS_MMC_IMG_LOAD_PART binds to SD/eMMC boot image only. This cause we
fails to load kernel image from SD after booting from flexspi.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Use SIP to start/Check M4.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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When M4 images (m4_0 and m4_1) are included into flash.bin, the bin size exceeds
the 1.2MB, which cause overlay with u-boot environment area.
To fix the issue, we change the u-boot environment offset to 4MB for SD and FlexSPI,
and align this for all i.MX8 platforms (i.MX8QM/QXP/MQ).
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The u-boot meets break, when host build server has installed swig and libpython3-dev,
but no libpython-dev installed.
tools/libfdt_wrap.c:147:21: fatal error: Python.h: No such file or directory
The root cause is tools/makefile checks the Python.h before building a libfdt Python module.
Since the u-boot is using "python" command not "python3", we should change to check the Python.h
under python2.x directory not every python directory (like python3.x). Otherwise when a python3
develop package is installed, the script will get the file and start to build libfdt if swig
is installed as well.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
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The lpuart0 is configured as console port on i.MX8QM LPDDR4 ARM2 board,
so its cts/rts pins are not necessary. Since M4_1 core will use lpuart2
as its console. We remove these two pinmux from DTS file.
Signed-off-by: Ye Li <ye.li@nxp.com>
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uboot will have below error log when verify boot.img
avb_util.c:199: ERROR: Failed to allocate memory.
the default size of malloc is 36M. But we need to load boot.img
with malloc addr. enlarge the size of malloc to 64M.
Change-Id: I64d0403b0cc970128cdfd1eafe7a4680a92f7c25
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
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rom_pointer[0] contains the base, rom_pointer[1] contains the size.
When TEE enabled, if not reserve the space, uboot relocation may
overwrite TEE or trigger fault when TZASC enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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CAAM do not work in imx8.
disable FASTBOOT_ENCRYPT_LOCK for lock&unlock and return 0
for fsl avb call back on imx8 device.
Change-Id: I79e2de2571a922ae22c2a52f0beb661762e11dd5
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
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add macro which support A/B boot and AVB.
change CONFIG_ANDROID_THINGS_SUPPORT to CONFIG_ANDROID_AB_SUPPORT
Change-Id: I08688e7b19ec7b8d71c7adcd298ae2ccc1e309c3
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
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support arm64 kernel image when enable AVB.
put the bootimage at hdr->kernel_addr - hdr->page_size.
copy ramdisk and dts to the addr in bootimage header.
Change-Id: I45c2f8238c2bf055130e6e7c2d5b431ca46e431e
Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
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According to the data sheet iMX8MXEC_Rev_E, the imx8mq has two CPU grades:
consumer and industrial, which has different maximum ARM CPU freq for nominal mode.
consumer: arm core clock @ 1Ghz
industrial: arm core clock @ 800Mhz.
So in u-boot we changed to check the CPU grade fuse and select the frequency for
ARM core clock.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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According to the FRAC PLL formula, DIVF_VAL = 1 + DIVFI + (DIVFF/224).
But in decode_frac_pll, the DIVFI and DIVFF are both added with 1. Fix it to
align with the formula.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Since imx8mq uses 25Mhz OSC as PLL's reference clock by default.
There is no 24Mhz used. So fix the ARM clock print value to 800Mhz and 1000Mhz.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The androidboot.slot_suffix kernel cmdline will be used to constitute
the full name of some partitions(like vendor partition), removing the
leading underline will cause these partitions mount failed.
Bug: 65174205
Change-Id: Icda99b51af75633b62c1950e44b5c27f02370ea4
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Pass bootloader metrics (nBLL, nBLE, KD, KL, AVB, ODT, SW)
to kernel by kernel cmdline.
Change-Id: Ibabff6844be86d028548d1ad697d948ef20590f3
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Change-Id: I17632f8d175177b5cb0a9165651fb3b732ae1145
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Make the device respond multiple packets after receiving fastboot
command "fastboot getvar all" from the host. It can make the
"fastboot getvar all" work both on Windows host and Linux host.
Change-Id: I428678369134b4228d7544fb3cbcb3469ffec6a1
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Change-Id: I2b8fd610258ffcf81fed25184e69a2d7f34c4b88
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Change-Id: I7f3f8061da76a0a4957ff042058173b2a86da4ba
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Remove the leading zeroes of 'partition-size', 'max-download-size',
'erase-block-size' and 'logical-block-size' variables.
Change-Id: I981cfced2d82a43e87a8f244caf04c6920bff5b2
Signed-off-by: ji.luo <ji.luo@nxp.com>
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Add ATX support in below boards which support Trusty OS:
* Argon (iopb)
* Pico-7d
* Pico-6ul
Change-Id: I41be527024f2e666cf4d83d01b7c775fc412a2c5
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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As ARMV7_NONSEC macro enabled so it will init uboot monitor
before jump to Linux and this will bring crash.
So goto Linux directly before this process.
Change-Id: Ieb44f326a4be21c20b662443c713009adb3c376e
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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This will make the CONFIG_IMX_TRUSTY_OS enabled in
the final .config file.
Change-Id: I242959e390cfb518508fb1b3cb8a2d0bd52b1841
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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Add SYS_ARM_CACHE_WRITEALLOC into Kconfig as
Trusty OS need inner/outer cache support write/read
alloc.
Change-Id: I75852c074cb3890d20717ae2a991015d436d7c69
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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Init ql-tipc after Trusty OS loaded.
Also release ql-tipc before jump to Linux.
Change-Id: Idf385eb8ccbf6edbd059a779e347cf062e6be39c
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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Secure Storage service in Trusty OS will compute
the encrypted mmc frame and the rpmb proxy inject the frame
to driver directly. So that need to export RPMB related
interface for Secure Storage proxy use.
Change-Id: I7f69831a20a440f597d323b610fa615fd4344d05
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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The lib provided ql-tipc communication channel with
Trusty OS.
Also the AVB, Keymaster and SecureStorage service
tipc client implement in this lib.
Change-Id: I0ab1ec9ee1b6f272b960c2e944008283c2c9249a
Signed-off-by: Haoran.Wang <elven.wang@nxp.com>
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This function is replaced by AVB, we don't need the
CONFIG_FSL_BOOTCTL anymore.
Change-Id: Ib418a4ec565e2a098f0a0ce574710317619bbebe
Signed-off-by: ji.luo <ji.luo@nxp.com>
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On our i.MX8MQ EVK board, we will support three frequency point:
1. 3200mts, DDRC core clock is 800MHz;
2. 400mts, DDRC core clock is 100MHz;
3. 100mts, DDRC core clock is 25MHz.
The 1D training flow need to be run once for each frequency. The
PHY training updated to support training different frequency point.
Additionally, the DDRC's registers of other frequency also need to
be configured.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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