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2022-08-05configs: am64x: Merge the HS and non-HS defconfigsAndrew Davis
For AM64x all devices are securable devices. Make the default defconfig include the secure configuration. Then remove the HS specific config. Non-HS devices will continue to boot due to runtime device type detection. If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS devices these can be ignored. Signed-off-by: Andrew Davis <afd@ti.com>
2022-06-02configs: Add configs for j721s2 High Security EVMJayesh Choudhary
Add j721s2 High Security EVM defconfig. These configs are same as for the non-secure part, except for: CONFIG_TI_SECURE_DEVICE option set to 'y' CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_BOOTCOMMAND does not have main_cpsw0_qsgmii_phyinit variable since j721s2 does not have ethernet firmware. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Acked-by: Andrew Davis <afd@ti.com>
2021-10-28configs: Add configs for am64x High Security EVMYogesh Siraswar
Add am64x High Security EVM defconfig. These defconfigs are the same as for the non-secure part, except for: CONFIG_TI_SECURE_DEVICE option set to 'y' CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_BOOTCOMMAND uses FIT images for booting Signed-off-by: Yogesh Siraswar <yogeshs@ti.com> [praneeth@ti.com: fix am64x_hs_evm_a53_defconfig,MAINTAINERS file and commitmsg] Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
2021-10-28configs: Add configs for j7200 High Security EVMYogesh Siraswar
Add j7200 High Security EVM defconfig. These defconfigs are the same as for the non-secure part, except for: CONFIG_TI_SECURE_DEVICE option set to 'y' CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y' CONFIG_BOOTCOMMAND uses FIT images for booting Signed-off-by: Yogesh Siraswar <yogeshs@ti.com> [praneeth@ti.com: fix j7200_hs_evm_r5_defconfig,MAINTAINERS file and commitmsg] Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
2021-09-08board: ti: Add support for the AM437x GP EVM mini boardAndreas Dannenberg
This is not really a new board but rather a minimal bootloader solution for the AM437x GP EVM. In terms of interfaces, it only supports booting from MMC0 or UART0 and only activates a minimal set of drivers that are that are necessary to run the device such as DDR, I2C, and PMIC. The goal is to provide a bare minimum starting point to boot Linux for basing custom board-ports on. The limited complexity of this solution should make it easier to achieve a successful boot to U-Boot prompt vs. trying to pair down the full-featured multi-platform AM437x U-Boot available through am43xx_evm_defconfig. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> [Amjad: fix compile and checkpatch warnings] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2021-09-08board: ti: Add support for the AM335x GP EVM mini boardAndreas Dannenberg
This is not really a new board but rather a minimal bootloader solution for the AM335x GP EVM. In terms of interfaces, it only supports booting from MMC0 or UART0 and only activates a minimal set of drivers that are that are necessary to run the device such as DDR, I2C, and PMIC. The goal is to provide a bare minimum starting point to boot Linux for basing custom board-ports on. The limited complexity of this solution should make it easier to achieve a successful boot to U-Boot prompt vs. trying to pair down the full-featured multi-platform AM335x U-Boot available through am335x_evm_defconfig. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> [Amjad: fix checkpatch and compile warnings] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2021-09-01dts: am57xx*: Add ipu early boot DT changesKeerthy
Add support for ipu early boot. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2021-09-01dts: dra7-ipu-common-early-boot.dtsi: Add all the ipu early boot related nodesKeerthy
Add all the ipu early boot related nodes Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2021-09-01remoteproc: ipu: Add driver to bring up ipuKeerthy
The driver enables IPU support. Basically enables the clocks, timers, watchdog timers and bare minimal MMU and supports loading the firmware from mmc. Signed-off-by: Keerthy <j-keerthy@ti.com> [Amjad: fix compile warnings] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2021-08-26reset: dra7: Add a reset driverKeerthy
Add a reset driver to bring IPs out of reset. Signed-off-by: Keerthy <j-keerthy@ti.com> [Amjad: reset_ops structure member "free" has been renamed to "rfree", use the latter instead] Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
2020-12-20Merge tag 'efi-2021-01-rc4' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2021-01-rc4 * Provide a tool to create a file with UEFI variables to preseed UEFI variable store. * Make size of UEFI variable store configurable. * Add man pages for commands 'bootefi' and 'button'.
2020-12-20MAINTAINERS: add tools/efivar.py to EFI PAYLOADHeinrich Schuchardt
tools/efivar.py allows to prepare a file with UEFI variables to preseed the UEFI variable store. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-20doc: man-page for bootefi commandHeinrich Schuchardt
Provide a description of the bootefi command. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-12-18spi: ca_sflash: Add CAxxxx SPI Flash ControllerPengpeng Chen
Add SPI Flash controller driver for Cortina Access CAxxxx SoCs Signed-off-by: Pengpeng Chen <pengpeng.chen@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Vignesh R <vigneshr@ti.com> CC: Tom Rini <trini@konsulko.com> [jagan: rebase on master] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-12-09MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emailsPatrice Chotard
Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-02MAINTAINERS: assign include/log.hHeinrich Schuchardt
include/log.h belongs to LOGGING. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-30lib: Add getoptSean Anderson
Some commands can get very unweildy if they have too many positional arguments. Adding options makes them easier to read, remember, and understand. This implementation of getopt has been taken from barebox, which has had option support for quite a while. I have made a few modifications to their version, such as the removal of opterr in favor of a separate getopt_silent function. In addition, I have moved all global variables into struct getopt_context. The getopt from barebox also re-orders the arguments passed to it so that non-options are placed last. This allows users to specify options anywhere. For example, `ls -l foo/ -R` would be re-ordered to `ls -l -R foo/` as getopt parsed the options. However, this feature conflicts with the const argv in cmd_tbl->cmd. This was originally added in 54841ab50c ("Make sure that argv[] argument pointers are not modified."). The reason stated in that commit is that hush requires argv to stay unmodified. Has this situation changed? Barebox also uses hush, and does not have this problem. Perhaps we could use their fix? I have assigned maintenance of getopt to Simon Glass, as it is currently only used by the log command. I would also be fine maintaining it. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-10-29Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
2020-10-29MAINTAINERS, git-mailrc: Update sunxi maintainersAndre Przywara
Maxime mentioned that he feels not having the time to be an Allwinner maintainer anymore. Take over from him. Maxime, many thanks for your great work in the past! I hope I can still relay the occasional technical question to you in the future. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-10-27rtc: provide an emulated RTCHeinrich Schuchardt
On a board without hardware clock this software real time clock can be used. The build time is used to initialize the RTC. So you will have to adjust the time either manually using the 'date' command or use the 'sntp' to update the RTC with the time from a network time server. See CONFIG_CMD_SNTP and CONFIG_BOOTP_NTPSERVER. The RTC time is advanced according to CPU ticks. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27MAINTAINERS: Record documentation for Xilinx platformsMichal Simek
Add fragment to cover documenation for Xilinx platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-26riscv: Move timer portions of SiFive CLINT to drivers/timerSean Anderson
Half of this driver is a DM-based timer driver, and half is RISC-V-specific IPI code. Move the timer portions in with the other timer drivers. The KConfig is not moved, since it also enables IPIs. It could also be split into two configs, but no boards use the timer but not the IPI atm, so I haven't split it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2020-10-26riscv: Move Andes PLMT driver to drivers/timerSean Anderson
This is a regular timer driver, and should live with the other timer drivers. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2020-10-22rng: Add Qualcomm MSM PRNG driverRobert Marko
Add support for the hardware pseudo random number generator found in Qualcomm SoC-s. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22net: Add IPQ40xx MDIO driverRobert Marko
This adds the driver for the IPQ40xx built-in MDIO. This will be needed to support future PHY driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22spi: Add Qualcomm QUP SPI controller driverRobert Marko
This patch adds support for the Qualcomm QUP SPI controller that is commonly found in most of Qualcomm SoC-s. Driver currently supports v1.1.1, v2.1.1 and v2.2.1 HW. FIFO and Block modes are supported, no support for DMA mode is planned. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-10-22Merge tag 'u-boot-stm32-20201021' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Activate CMD_EXPORTENV/CMD_IMPORTENV/CMD_ELF for STM32MP15 defconfig - Fix stm32prog command: parsing of FlashLayout without partition - Update MAINTAINERS for ARM STM STM32MP - Manage eth1addr on dh board with KS8851 - Limit size of cacheable DDR in pre-reloc stage in stm32mp1 - Use mmc_of_parse() to read host capabilities in mmc:sdmmc2 driver
2020-10-21MAINTAINERS: Add STM32MP1 RNG driver in stm32mp platformPatrick Delaunay
Add the STM32MP1 RNG driver in the list of drivers supported by the STMicroelectronics STM32MP15x series. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-21MAINTAINERS: Add stm32 and stm regexp for ARM STM STM32MP platformPatrick Delaunay
Add files and directories regex "stm32" and "stm" in "ARM STM STM32MP" platform to avoid missing files or drivers supported by the STMicroelectronics series STM32MP15x. This patch adds the rules already used in Linux kernel for ARM/STM32 ARCHITECTURE. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-10-20MAINTAINERS: add USB driver to ARM MEDIATEKChunfeng Yun
Add MediaTek USB3 Dual-Role controller driver to ARM MEDIATEK, and add myself as a maintainer for it. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-10-08pinctrl: Add support for Kendryte K210 FPIOASean Anderson
The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. However, GPIO functionality remains largely unimplemented (in favor of the dedicated GPIO peripherals). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-08test: pinmux: Add test for pin muxingSean Anderson
This extends the pinctrl-sandbox driver to support pin muxing, and adds a test for that behaviour. The test is done in C and not python (like the existing tests for the pinctrl uclass) because it needs to call pinctrl_select_state. Another option could be to add a command that invokes pinctrl_select_state and then test everything in test/py/tests/test_pinmux.py. The pinctrl-sandbox driver now mimics the way that many pinmux devices work. There are two groups of pins which are muxed together, as well as four pins which are muxed individually. I have tried to test all normal paths. However, very few error cases are explicitly checked for. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-06MAINTAINERS: assign doc/arch/sandbox.rstHeinrich Schuchardt
Add doc/arch/sandbox.rst to the scope of SANDBOX. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-05Merge tag 'u-boot-atmel-2021.01-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for 2021.01 cycle: This feature set includes a new CPU driver for at91 family, new driver for PIT64B hardware timer, support for new at91 family SoC named sama7g5 which adds: clock support, including conversion of the clock tree to CCF; SoC support in mach-at91, pinctrl and mmc drivers update. The feature set also includes updates for mmc driver and some other minor fixes and features regarding building without the old Atmel PIT and the possibility to read a secondary MAC address from a second i2c EEPROM.
2020-10-05cpu: at91: add driver for CPUClaudiu Beznea
Add basic CPU driver use to retrieve information about CPU itself. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-09-28MAINTAINERS: add Microchip PIT64B timerClaudiu Beznea
Add Microchip PIT64B timer. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-09-21Merge branch 'master' into nextTom Rini
Merge in v2020.10-rc5
2020-09-18phy: add driver for Qualcomm IPQ40xx USB PHYRobert Marko
Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs. The driver sets up HS and SS phys. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-18reset: Add IPQ40xx reset controller driverRobert Marko
On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets. So since this will be needed by further drivers, lets add a driver for the reset controller. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-16MAINTAINERS: add myself as reviewer for SquashFSMiquel Raynal
I also followed the development of the SquashFS support in U-Boot as part of Joao Marcos internship, so I would also appreciate receiving new contributions and bug reports related to this topic. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-09-16MAINTAINERS: add myself as reviewer for SquashFSThomas Petazzoni
As I have followed the development of the SquashFS support in U-Boot as part of Joao Marcos work, it makes sense to get Cc'ed on contributions/bug reports related to the squashfs support. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2020-09-16MAINTAINERS: update clk entry git treeBaruch Siach
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-09-09dt-bindings: clock: import Qualcomm IPQ4019 bindingsRobert Marko
Import Qualcomm IPQ4019 GCC bindings from Linux. This will enable using bindings instead of raw clock numbers both in the driver and DTS like Linux does. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-09-09MAINTAINERS: update maintainers file for new filesRayagonda Kokatanur
Update MAINTAINERS file for new files. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-07MAINTAINERS: Add btrfs mailing list and myself as reviewerQu Wenruo
Since the current code base is mostly from btrfs-progs, anyone contributing to U-Boot btrfs code could also help us to improve btrfs-progs and btrfs kernel module. Also add myself as designated reviewer. Signed-off-by: Qu Wenruo <wqu@suse.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
2020-08-31MAINTAINERS: step down as maintainer of UniPhier SoCsMasahiro Yamada
I am leaving Socionext. Orphan the UniPhier platform until somebody takes the role. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-08-24MAINTAINERS: Add maintainers to XEN sectionAnastasiia Lukianenko
Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-14MAINTAINERS: Add maintainers for Aspeed SoCsChia-Wei, Wang
Update maintainers for Aspeed SoC platforms. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-08-07led: led_cortina: Add CAxxx LED supportJway Lin
Add Cortina Access LED controller support for CAxxxx SOCs Signed-off-by: Jway Lin <jway.lin@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Simon Glass <sjg@chromium.org> Add head file fixed link error and remove unused flashing function Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-07test/py: Add tests for the SquashFS commandsJoao Marcos Costa
Add Python scripts to test 'ls' and 'load' commands. The scripts generate a SquashFS image and clean the directory after the assertions, or if an exception is raised. Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>