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2022-11-08Merge remote-tracking branch 'gh-nxp/lf_v2022.04' into ↵Philippe Schenker
update-to-5.15.52_2.1.0__toradex_imx_lf_v2022.04
2022-10-08LFU-400 imx8ulp: clock: Clear dividers in PLL3DIV_PFD registersYe Li
At present, in cgc1_pll3_init we don't set the pll3pfd div values, just use the default 0. But when MROM-3029 is applied, ROM will set PLL3 pfd1div2 to 1 and pfd2div1 to 3. This finally causes some clocks' rate decreased, for example USDHC. So clear the PLL3DIV_PFD dividers to get correct rate. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 91eb5a47b996b531c5fda5e421d35f54f486c548)
2022-10-08LFU-399 imx8ulp: Reconfigure MRC3 for SRAM0 accessYe Li
Some space in SRAM0 will be protected by S400 to allow RX SecPriv mode access only for boot purpose. Since SW will reuse the SRAM0 as SCMI buffer and SPL container loading buffer, need to reconfigure MRC3. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit ebfac7540de520b97724d3fd2d5918b4b56327b1)
2022-10-04arm: dts: verdin-imx8mp: enable caam in SPLAndrejs Cainikovs
CAAM is initialized in SPL, so relevant device tree nodes needs to be updated. Upstream-Status: Submitted [https://lore.kernel.org/all/20221004110632.21045-2-andrejs.cainikovs@toradex.com/] Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
2022-09-23arm64: dts: verdin-imx8mp: add downstream usb propertiesMarcel Ziswiler
Add downstream-specific USB properties. Upstream-Status: Inappropriate [other] - NXP downstream specific Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-09-23arm64: dts: imx8mp: add rdc configAndrejs Cainikovs
Suppress warning by adding default RDC configuration. Upstream-Status: Inappropriate [other] - NXP downstream specific Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
2022-09-07configs: verdin-imx8mm: add missing USB features vs BSP5Andrejs Cainikovs
This commit adds few USB related features: - USB Gadget devices - USB Mass Storage (aka UMS) - Fastboot Upstream-Status: Inappropriate [other] - NXP downstream specific Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
2022-09-05Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LFU-386 imx: ele_ahab: Remove OEM Secure World Closed print
2022-09-05LFU-386 imx: ele_ahab: Remove OEM Secure World Closed printYe Li
The OEM Secure World Closed is not a valid lifecycle on iMX8ULP/iMX9. So remove it from lifecycle print. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-30Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LF-6846 imx8ulp: XRDC: configure DRAM access for S400
2022-08-30LF-6846 imx8ulp: XRDC: configure DRAM access for S400Ye Li
Need to add DRAM access permission for S400, as S400 needs to access it When SPL calls image authentication Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-24Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LF-6798 imx: ele_ahab: confirm lifecycle before closing the part
2022-08-24LF-6798 imx: ele_ahab: confirm lifecycle before closing the partYe Li
Before moving the lifecycle to OEM closed, confirm the lifecycle is OEM open, otherwise cancel to move forward the lifecycle. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-22Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LF-6816 imx9: Print CPU frequency in u-boot log
2022-08-22LF-6816 imx9: Print CPU frequency in u-boot logYe Li
Follow other iMX u-boot, print the CPU frequency in boot log Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-17Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LFU-382 imx93: Change hard coded MAC to read from fuse
2022-08-17LFU-382 imx93: Change hard coded MAC to read from fuseYe Li
The MAC addresses are hard coded for bring up. Change it to support reading from fuse. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2022-08-03Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LFU-376 imx93_evk: Change ethprime to eQOS port for default LFU-378 imx8ulp: Hang the u-boot when M33 is not loaded LFU-377-2 imx: spl_imx_romapi: Get and print boot stage LFU-377-1 imx: container: Skip container set check for ROM API
2022-08-03LFU-378 imx8ulp: Hang the u-boot when M33 is not loadedYe Li
When M33 handshake is necessary, current u-boot will panic to reset itself. Change to not panic but hang the u-boot, so that M33 tests can use JTAG to load M33 image. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-03LFU-377-2 imx: spl_imx_romapi: Get and print boot stageYe Li
Get and print boot stage through ROM API in SPL Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-03LFU-377-1 imx: container: Skip container set check for ROM APIYe Li
Skip the container check for platforms using ROM API. It causes always printing primary container set used Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-03Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: MA-20481-2 Enable round mipi-panel usmp-rm67162 for imx8ulp watch board MA-20481-1 Add board files and defconfig for imx8ulp watch board
2022-08-03MA-20481-1 Add board files and defconfig for imx8ulp watch boardZhang Bo
New imx8ulp_watch files are based on imx8ulp_evk and modified for watch board. Change-Id: I0ad6130cd7df60cb453abb9adcf36242f3cc0fd5 Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
2022-08-01Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: (6 commits) LFU-369-4: Added configs required for dcp_rng driver LFU-369-3: Added dcp_rng driver device binding code LFU-369-2: Uboot RNG Driver using Data Co-processor LFU-369-1: Adding rngb entry in imx6ull device tree LFU-373 imx8ulp: upower: Do not send AFFB enable message for A1 ...
2022-08-01LFU-369-3: Added dcp_rng driver device binding codeKshitiz
This commit manually binds dcp_rng device driver and initalizes it inside arch_misc_init() function. Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-08-01LFU-369-1: Adding rngb entry in imx6ull device treeKshitiz
Added entry for rngb in imx6ull device tree which is required for Random number generation in u-boot. Signed-off-by: Kshitiz Varshney <kshitiz.varshney@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-08-01LFU-373 imx8ulp: upower: Do not send AFFB enable message for A1Ye Li
On A1 part, upower ROM will default enable AFFB for APD/AVD/RTD before power on domains. We don't need to send the AFFB enable message any more. Actually enabling the AFFB of APD should happen during power mode switch which needs put APD to hold mode. It is hard to implement for boot, so upower ROM's implementation is necessary and simple. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-08-01imx8ulp: clock: Fix lcd clock algoLoic Poulain
The div loop uses reassign and reuse parent_rate, which causes the parent rate reference to be wrong after the first loop, the resulting clock becomes incorrect for div != 1. Fixes: 829e06bf4175 ("imx8ulp: clock: Add MIPI DSI clock and DCNano clock") Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 85d0580e684c74dcb0a90aa0c010006cda40af44)
2022-07-31Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LFU-372-3 imx8ulp: Enable SCMI thermal for temperature LFU-372-2 DTS: imx8ulp: Add SCMI sensor node LFU-372-1 thermal: Add SCMI Sensor based thermal driver
2022-07-31LFU-372-3 imx8ulp: Enable SCMI thermal for temperatureYe Li
Change from PMC thermal driver to SCMI thermal to get temperature, so that we can avoid TRDC access issue for PMC and ADC on RTD Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Alice Guo <alice.guo@nxp.com>
2022-07-31LFU-372-2 DTS: imx8ulp: Add SCMI sensor nodeYe Li
Add SCMI sensor node and enable pre-relocation for SCMI, so that we can use SCMI thermal driver at early phase of u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Alice Guo <alice.guo@nxp.com>
2022-07-29Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LF-6692-4 imx8ulp_evk: Disable the PMC thermal driver LF-6692-3 imx8ulp: Adjust handshake to sync TRDC and XRDC completion LF-6692-2 imx8ulp: Remove the TRDC configure from A35 LF-6692-1 imx8ulp: xrdc: Fix DID0 access DDR in MRC4
2022-07-29LF-6692-3 imx8ulp: Adjust handshake to sync TRDC and XRDC completionYe Li
To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment. M33 will be the TRDC owner and needs to configure TRDC. A35 is the XRDC owner, ATF will configure XRDC. The handshake between U-boot and M33 image is used to sync TRDC and XRDC configuration completion. Once the handshake is done, A35 and M33 can access the allowed resources in others domain. The handshake is needed when M33 is booted or DBD_EN fused, because both cases will enable the TRDC. If handshake is timeout, the boot will panic. We use SIM GPR0 to pass the info from SPL to u-boot, as before the handshake, u-boot can't access SEC SIM and FSB. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2022-07-29LF-6692-2 imx8ulp: Remove the TRDC configure from A35Ye Li
As M33 is responsible for TRDC configuration, the settings for A35 nonsecure world access and DMA0 access are moved to M33 image. So remove the codes to release TRDC and configure it. Just keep the configurations for reference. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2022-07-29LF-6692-1 imx8ulp: xrdc: Fix DID0 access DDR in MRC4Ye Li
eDMA1 and USHDC0 access to DDR are controlled by MRC4, so must configure the MRC4 for DID0 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2022-07-26Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: LFOPTEE-169 imx8ulp: s400: start the S400 RNG at boot
2022-07-26Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: MA-20464 imx8mp: move enet1 to domain 1
2022-07-26LFOPTEE-169 imx8ulp: s400: start the S400 RNG at bootClement Faure
On the imx8ulp A1 SoC, the S400 RNG needs to be manually started. Signed-off-by: Clement Faure <clement.faure@nxp.com>
2022-07-26MA-20464 imx8mp: move enet1 to domain 1Ji Luo
move the enet1 to mcu domain as mcu may use it. Change-Id: I65d42d37c97139cf51b00f541e6688e2a97cc624 Signed-off-by: Ji Luo <ji.luo@nxp.com>
2022-07-19Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: (11 commits) LFU-332-10: configs: imx8mm: ab2 target board config options LFU-332-9: include: configs: imx8mm ab2: board configs LFU-332-8: dts: arm: imx8mm ab2: target board support LFU-332-7: arm: mach imx8m: imx8mm ab2 target board configs LFU-332-6: board: freescale: imx8mm ab2: target board support ...
2022-07-18LFU-332-8: dts: arm: imx8mm ab2: target board supportAdrian Alonso
Add device tree configs for audio board 2.0 for common imx8mm som modules Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-07-18LFU-332-7: arm: mach imx8m: imx8mm ab2 target board configsAdrian Alonso
Add iMX8M Mini Audio board 2.0 target board configs Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-07-18LFU-332-3: dts: arm: imx8mn ab2: target board supportAdrian Alonso
Add device tree configs for audio board 2.0 for common imx8mn som modules Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-07-18LFU-332-2: arm: mach imx8m: imx8mn ab2 target board configsAdrian Alonso
Add iMX8M Nano Audio board 2.0 target board configs Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-07-18Merge remote-tracking branch 'origin/imx_v2022.04' into lf_v2022.04BJ DevOps Team
* origin/imx_v2022.04: (8 commits) MLK-25979-3 imx8ulp: xrdc: Set MRC4/5 for access DDR from A35 and APD PER MLK-25979-2 imx8ulp: soc: Limit the eMMC ROM API workaround to A0.1 part MLK-25979-1 imx8ulp: soc: Get chip revision from Sentinel LF-6576 serial: lpuart: Fix LPUART FIFO_RXFE for all platforms MLK-25974 tcpc: check if i2c_dev is NULL before dm_i2c_read/write operation ...
2022-07-18MLK-25979-3 imx8ulp: xrdc: Set MRC4/5 for access DDR from A35 and APD PERYe Li
iMX8ULP A1 S400 ROM will remove the setting for MRC4/5. So we have to set them in SPL to allow access to DDR from A35 and APD PER masters Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-07-18MLK-25979-2 imx8ulp: soc: Limit the eMMC ROM API workaround to A0.1 partYe Li
Since A1 ROM has fixed the ROM API eMMC issue, we should only use the workaround for A0.1 part. Add a SOC revision check. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-07-18MLK-25979-1 imx8ulp: soc: Get chip revision from SentinelYe Li
In both SPL and u-boot, after probing the S400 MU, get the chip revision, lifecycle and UID from Sentinel. Update get_cpu_rev to use the chip revision not hard coded it for A0 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-07-18LFU-361-3 arm: dts: imx93: move usb i2c devices to i2c3Clark Wang
According to the board design change, move USB i2c devices to lpi2c3 bus. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-07-18LFU-361-2 imx9: clock: correct i2c clock rootClark Wang
The root clock used in imx_get_i2cclk() is incorrect. Change it to LPI2C1_CLK_ROOT. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
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