| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-10-27 | arm: socfpga: vining_fpga: Adding handoff for SDRAM ctrlcfg.extratime1 | Chin Liang See | |
| Adding new handoff for SDRAM ctrcfg.extratime1 which is required for stable LPDDR2 operation. Since the board is using DDR3, the handoff is set to default value 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> | |||
| 2016-06-01 | arm: socfpga: Add samtec VIN|ING board | Marek Vasut | |
| Add support for board based on the popular Altera Cyclone V SoC. This board has the following properties: - 1 GiB of DRAM - 1 Gigabit ethernet - 1 USB gadget port - 1 USB host port with an on-board hub - 2 QSPI NORs connected to the Cadence QSPI core - Multiple I2C EEPROMs and one I2C temperature sensor Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> --- V2: Update the defconfig as per Tom's request | |||
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index : u-boot-toradex.git | |
| U-Boot bootloader for Apalis and Colibri modules | Marcel Ziswiler |
| summaryrefslogtreecommitdiff |