From 2a1325206da5381292c2b268e248702c523cc927 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Wed, 22 Aug 2012 16:16:26 +0200 Subject: Initial Toradex Colibri T20 L4T R15 support. --- arch/arm/cpu/armv7/tegra-common/display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv7/tegra-common/display.c') diff --git a/arch/arm/cpu/armv7/tegra-common/display.c b/arch/arm/cpu/armv7/tegra-common/display.c index 2f12084447..55ea13e128 100644 --- a/arch/arm/cpu/armv7/tegra-common/display.c +++ b/arch/arm/cpu/armv7/tegra-common/display.c @@ -117,7 +117,7 @@ static int update_display_mode(struct dc_disp_reg *disp, /* * The pixel clock divider is in 7.1 format (where the bottom bit * represents 0.5). Here we calculate the divider needed to get from - * the display clock (typically 600MHz for tegra2 and 216MHZ + * the display clock (typically 600MHz for tegra2 and 216MHz * for tegra3) to the pixel clock. We round up or down as requried. */ #if defined(CONFIG_TEGRA2) -- cgit v1.2.3