From e7c15b7ab8e3e1c053c4b0acaf025487c43244b7 Mon Sep 17 00:00:00 2001 From: Diego Rondini Date: Tue, 19 Nov 2019 14:43:33 +0100 Subject: sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2 Orangepi Zero Plus 2 is an open-source single-board computer, available in two Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the H5 is already supported. H3 Orangepi Zero Plus 2 has: - Quad-core Cortex-A7 - 512MB DDR3 - microSD slot and 8GB eMMC - Debug TTL UART - HDMI - Wifi + BT - OTG + power supply Sync dts from linux v5.2 commit: "ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry" (sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b) Commit: "ARM: dts: sun8i: h3: Refactor the pinctrl node names" (sha1: a4dc791974e568a15f7f37131729b1a6912f4811) has been avoided as it breaks U-Boot build. Signed-off-by: Diego Rondini Reviewed-by: Jagan Teki --- configs/orangepi_zero_plus2_h3_defconfig | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 configs/orangepi_zero_plus2_h3_defconfig (limited to 'configs/orangepi_zero_plus2_h3_defconfig') diff --git a/configs/orangepi_zero_plus2_h3_defconfig b/configs/orangepi_zero_plus2_h3_defconfig new file mode 100644 index 0000000000..3000a97e73 --- /dev/null +++ b/configs/orangepi_zero_plus2_h3_defconfig @@ -0,0 +1,19 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_MACH_SUN8I_H3=y +CONFIG_DRAM_CLK=672 +# CONFIG_DRAM_ODT_EN is not set +CONFIG_MMC0_CD_PIN="PH13" +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_USE_PREBOOT=y +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-zero-plus2" +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -- cgit v1.2.3