/* * Copyright 2017 NXP * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /{ cpus { #address-cells = <2>; #size-cells = <0>; idle-states { entry-method = "psci"; CPU_SLEEP: cpu-sleep { compatible = "arm,idle-state"; local-timer-stop; arm,psci-suspend-param = <0x0000000>; entry-latency-us = <700>; exit-latency-us = <250>; min-residency-us = <1000>; }; CLUSTER_SLEEP: cluster-sleep { compatible = "arm,idle-state"; local-timer-stop; arm,psci-suspend-param = <0x1000000>; entry-latency-us = <1000>; exit-latency-us = <700>; min-residency-us = <2700>; wakeup-latency-us = <1500>; }; }; /* We have 1 clusters having 4 Cortex-A53 cores */ A53_0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&A53_L2>; cpu-idle-states = <&CPU_SLEEP>; }; A53_1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x1>; enable-method = "psci"; next-level-cache = <&A53_L2>; cpu-idle-states = <&CPU_SLEEP>; }; A53_2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x2>; enable-method = "psci"; next-level-cache = <&A53_L2>; cpu-idle-states = <&CPU_SLEEP>; }; A53_3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x3>; enable-method = "psci"; next-level-cache = <&A53_L2>; cpu-idle-states = <&CPU_SLEEP>; }; A53_L2: l2-cache0 { compatible = "cache"; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; cpu_suspend = <0xc4000001>; cpu_off = <0xc4000002>; cpu_on = <0xc4000003>; }; };