// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
 * Copyright 2017-2019 Toradex
 */

/dts-v1/;

/* First 128KB is for PSCI ATF. */
/memreserve/ 0x80000000 0x00020000;

#include "fsl-imx8qm.dtsi"

/ {
	model = "Toradex Apalis iMX8QM";
	compatible = "toradex,apalis-imx8qm", "fsl,imx8qm";

	chosen {
		bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200";
		stdout-path = &lpuart1;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usb_otg1_vbus: regulator@0 {
			compatible = "regulator-fixed";
			reg = <0>;
			regulator-name = "usb_otg1_vbus";
			regulator-min-microvolt = <5000000>;
			regulator-max-microvolt = <5000000>;
			gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		reg_usdhc2_vmmc: usdhc2_vmmc {
			compatible = "regulator-fixed";
			regulator-name = "sw-3p3-sd1";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog_1>;

	apalis-imx8qm {
		pinctrl_hog_1: hoggrp-1 {
			fsl,pins = <
				SC_P_USB_SS3_TC0_LSIO_GPIO4_IO03	  0x06000048
			>;
		};

		pinctrl_fec1: fec1grp {
			fsl,pins = <
				SC_P_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD	0x000014a0 /* Use pads in 3.3V/1.8V mode */
				SC_P_ENET0_MDC_CONN_ENET0_MDC			0x06000020
				SC_P_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020
				SC_P_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x06000020
				SC_P_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC	0x06000020
				SC_P_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0	0x06000020
				SC_P_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1	0x06000020
				SC_P_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2	0x06000020
				SC_P_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3	0x06000020
				SC_P_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC	0x06000020
				SC_P_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x06000020
				SC_P_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0	0x06000020
				SC_P_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1	0x06000020
				SC_P_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2	0x06000020
				SC_P_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3	0x06000020
				SC_P_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	0x06000020
				SC_P_LVDS1_GPIO01_LSIO_GPIO1_IO11		0x06000020
			>;
		};

		pinctrl_lpi2c1: lpi2c1grp {
			fsl,pins = <
				SC_P_GPT0_CLK_DMA_I2C1_SCL		0x06000020
				SC_P_GPT0_CAPTURE_DMA_I2C1_SDA		0x06000020
				/*
				 * Change the default alt function from SCL/SDA to others,
				 * to avoid select input conflict with GPT0
				 */
				SC_P_USB_SS3_TC0_LSIO_GPIO4_IO03	0x0700004c
				SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04	0x0700004c
				SC_P_USB_SS3_TC2_LSIO_GPIO4_IO05	0x0700004c
				SC_P_USB_SS3_TC3_LSIO_GPIO4_IO06	0x0700004c
			>;
		};

		pinctrl_lpuart0: lpuart0grp {
			fsl,pins = <
				SC_P_UART0_RX_DMA_UART0_RX		0x06000020
				SC_P_UART0_TX_DMA_UART0_TX		0x06000020
			>;
		};

		pinctrl_lpuart1: lpuart1grp {
			fsl,pins = <
				SC_P_UART1_RX_DMA_UART1_RX		0x06000020
				SC_P_UART1_TX_DMA_UART1_TX		0x06000020
			>;
		};

		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				SC_P_EMMC0_CLK_CONN_EMMC0_CLK		0x06000041
				SC_P_EMMC0_CMD_CONN_EMMC0_CMD		0x00000021
				SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0	0x00000021
				SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1	0x00000021
				SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2	0x00000021
				SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3	0x00000021
				SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4	0x00000021
				SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5	0x00000021
				SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6	0x00000021
				SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7	0x00000021
				SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE	0x06000041
				SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x00000021
			>;
		};

		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
			fsl,pins = <
				SC_P_EMMC0_CLK_CONN_EMMC0_CLK		0x06000040
				SC_P_EMMC0_CMD_CONN_EMMC0_CMD		0x00000020
				SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0	0x00000020
				SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1	0x00000020
				SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2	0x00000020
				SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3	0x00000020
				SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4	0x00000020
				SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5	0x00000020
				SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6	0x00000020
				SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7	0x00000020
				SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE	0x06000040
				SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x00000020
			>;
		};

		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
			fsl,pins = <
				SC_P_EMMC0_CLK_CONN_EMMC0_CLK		0x06000040
				SC_P_EMMC0_CMD_CONN_EMMC0_CMD		0x00000020
				SC_P_EMMC0_DATA0_CONN_EMMC0_DATA0	0x00000020
				SC_P_EMMC0_DATA1_CONN_EMMC0_DATA1	0x00000020
				SC_P_EMMC0_DATA2_CONN_EMMC0_DATA2	0x00000020
				SC_P_EMMC0_DATA3_CONN_EMMC0_DATA3	0x00000020
				SC_P_EMMC0_DATA4_CONN_EMMC0_DATA4	0x00000020
				SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5	0x00000020
				SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6	0x00000020
				SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7	0x00000020
				SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE	0x06000040
				SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B	0x00000020
			>;
		};

		pinctrl_usdhc2_gpio: usdhc2grpgpio {
			fsl,pins = <
				SC_P_ESAI1_TX1_LSIO_GPIO2_IO09		0x00000021
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000041
				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000021
				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000021
				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000021
				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000021
				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000021
				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000021
				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000021
				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000021
				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000021
				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000021
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
			fsl,pins = <
				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040
				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020
				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020
				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020
				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020
				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020
				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000020
				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000020
				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000020
				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000020
				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
			fsl,pins = <
				SC_P_USDHC1_CLK_CONN_USDHC1_CLK		0x06000040
				SC_P_USDHC1_CMD_CONN_USDHC1_CMD		0x00000020
				SC_P_USDHC1_DATA0_CONN_USDHC1_DATA0	0x00000020
				SC_P_USDHC1_DATA1_CONN_USDHC1_DATA1	0x00000020
				SC_P_USDHC1_DATA2_CONN_USDHC1_DATA2	0x00000020
				SC_P_USDHC1_DATA3_CONN_USDHC1_DATA3	0x00000020
				SC_P_USDHC1_DATA4_CONN_USDHC1_DATA4	0x00000020
				SC_P_USDHC1_DATA5_CONN_USDHC1_DATA5	0x00000020
				SC_P_USDHC1_DATA6_CONN_USDHC1_DATA6	0x00000020
				SC_P_USDHC1_DATA7_CONN_USDHC1_DATA7	0x00000020
				SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT	0x00000020
			>;
		};

		pinctrl_usdhc3: usdhc3grp {
			fsl,pins = <
				SC_P_USDHC2_CLK_CONN_USDHC2_CLK         0x06000041
				SC_P_USDHC2_CMD_CONN_USDHC2_CMD         0x00000021
				SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0     0x00000021
				SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1     0x00000021
				SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2     0x00000021
				SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3     0x00000021
				/* CD */
				SC_P_USDHC2_CD_B_LSIO_GPIO4_IO12        0x00000021
			>;
		};
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec1>;
	phy-mode = "rgmii";
	fsl,rgmii_rxc_dly;
	fsl,rgmii_txc_dly;
	phy-handle = <&ethphy0>;
	phy-reset-gpios = <&gpio1 11 1>;
	phy-reset-duration = <10>;
	fsl,magic-packet;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@7 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <7>;
		};
	};
};

&gpio2 {
	status = "okay";
};

&gpio4 {
	status = "okay";
};

&gpio5 {
	status = "okay";
};

&lpuart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart0>;
	status = "okay";
};

&lpuart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart1>;
	status = "okay";
};

&usbotg1 {
	vbus-supply = <&reg_usb_otg1_vbus>;
	srp-disable;
	hnp-disable;
	adp-disable;
	disable-over-current;
	dr_mode = "peripheral";
	status = "okay";
};

&usb2 {
	dr_mode = "host";
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	bus-width = <4>;
	cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	status = "okay";
};

&usdhc3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc3>;
	bus-width = <4>;
	cd-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
	status = "okay";

};