// SPDX-License-Identifier: GPL-2.0+ OR X11 /* * Copyright 2016-2019 Toradex AG */ /dts-v1/; #include #include "imx7d.dtsi" &i2c1 { pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; status = "okay"; rn5t567@33 { compatible = "ricoh,rn5t567"; reg = <0x33>; regulators { reg_DCDC1: DCDC1 { /* V1.0_SOC */ regulator-min-microvolt = <1000000>; regulator-max-microvolt = <1100000>; regulator-boot-on; regulator-always-on; }; reg_DCDC2: DCDC2 { /* V1.1_ARM */ regulator-min-microvolt = <975000>; regulator-max-microvolt = <1100000>; regulator-boot-on; regulator-always-on; }; reg_DCDC3: DCDC3 { /* V1.8 */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_DCDC4: DCDC4 { /* V1.35_DRAM */ regulator-min-microvolt = <1350000>; regulator-max-microvolt = <1350000>; regulator-boot-on; regulator-always-on; }; reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; }; reg_LDO2: LDO2 { /* +V1.8_SD */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; reg_LDO4: LDO4 { /* V1.8_LPSR */ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; }; }; &i2c4 { pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c4>; pinctrl-1 = <&pinctrl_i2c4_gpio>; sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>; scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>; status = "okay"; }; &fec1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_enet1>; pinctrl-1 = <&pinctrl_enet1_sleep>; clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, <&clks IMX7D_ENET_AXI_ROOT_CLK>, <&clks IMX7D_ENET1_TIME_ROOT_CLK>, <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, <&clks IMX7D_ENET1_TIME_ROOT_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; phy-mode = "rmii"; phy-supply = <®_LDO1>; fsl,magic-packet; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>; uart-has-rtscts; fsl,dte-mode; status = "okay"; }; &usdhc1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; no-1-8-v; cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; disable-wp; status = "okay"; }; &iomuxc { pinctrl_i2c4: i2c4-grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f >; }; pinctrl_i2c4_gpio: i2c4-gpio-grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 0x4000007f >; }; pinctrl_uart1: uart1-grp { fsl,pins = < MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 >; }; pinctrl_uart1_ctrl1: uart1-ctrl1-grp { fsl,pins = < MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */ MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */ >; }; pinctrl_usdhc1: usdhc1-grp { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x59 MX7D_PAD_SD1_CLK__SD1_CLK 0x19 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 >; }; pinctrl_lcdif_dat: lcdif-dat-grp { fsl,pins = < MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 >; }; pinctrl_lcdif_ctrl: lcdif-ctrl-grp { fsl,pins = < MX7D_PAD_LCD_CLK__LCD_CLK 0x79 MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 >; }; pinctrl_enet1: enet1grp { fsl,pins = < MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 MX7D_PAD_SD2_WP__ENET1_MDC 0x3 >; }; pinctrl_enet1_sleep: enet1sleepgrp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 >; }; }; &iomuxc_lpsr { pinctrl_i2c1: i2c1-grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f >; }; pinctrl_i2c1_gpio: i2c1-gpio-grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x4000007f >; }; pinctrl_cd_usdhc1: usdhc1-cd-grp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */ >; }; };