// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2020 NXP
 */

#include "imx8mm-u-boot.dtsi"

/ {
	chosen {
		bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";
	};

	wdt-reboot {
		compatible = "wdt-reboot";
		wdt = <&wdog1>;
		u-boot,dm-spl;
	};

	aliases {
		usbgadget0 = &usbg1;
		usbgadget1 = &usbg2;
	};

	usbg1: usbg1 {
		compatible = "fsl,imx27-usb-gadget";
		dr_mode = "peripheral";
		chipidea,usb = <&usbotg1>;
		status = "okay";
	};

	usbg2: usbg2 {
		compatible = "fsl,imx27-usb-gadget";
		dr_mode = "peripheral";
		chipidea,usb = <&usbotg2>;
		status = "okay";
	};

	firmware {
		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};
	};
};

&reg_usdhc2_vmmc {
	u-boot,off-on-delay-us = <20000>;
	u-boot,dm-spl;
};

&pinctrl_reg_usdhc2_vmmc {
	u-boot,dm-spl;
};

&pinctrl_uart2 {
	u-boot,dm-spl;
};

&pinctrl_usdhc2_gpio {
	u-boot,dm-spl;
};

&pinctrl_usdhc2 {
	u-boot,dm-spl;
};

&gpio1 {
	u-boot,dm-spl;
};

&gpio2 {
	u-boot,dm-spl;
};

&gpio3 {
	u-boot,dm-spl;
};

&gpio4 {
	u-boot,dm-spl;
};

&gpio5 {
	u-boot,dm-spl;
};

&uart2 {
	u-boot,dm-spl;
};

&usdhc1 {
	u-boot,dm-spl;
	assigned-clocks = <&clk IMX8MM_CLK_USDHC1>;
	assigned-clock-rates = <400000000>;
	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_400M>;
};

&usdhc2 {
	u-boot,dm-spl;
	sd-uhs-sdr104;
	sd-uhs-ddr50;
	assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
	assigned-clock-rates = <400000000>;
	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_400M>;
	fsl,signal-voltage-switch-extra-delay-ms = <8>;
};

&i2c1 {
	u-boot,dm-spl;
};

&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} {
	u-boot,dm-spl;
};

&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} {
	u-boot,dm-spl;
};

&pinctrl_i2c1 {
	u-boot,dm-spl;
};

&pinctrl_pmic {
	u-boot,dm-spl;
};

&fec1 {
	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};

&ethphy0 {
	vddio0: vddio-regulator {
		regulator-name = "VDDIO";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};
};

&wdog1 {
	u-boot,dm-spl;
};

&usbotg1 {
	status = "okay";
	extcon = <&ptn5110>;
};

&lcdif {
	/delete-property/ assigned-clocks;
	/delete-property/ assigned-clock-parents;
	/delete-property/ assigned-clock-rates;
};

&mipi_dsi {
	/delete-property/ assigned-clocks;
	/delete-property/ assigned-clock-parents;
	/delete-property/ assigned-clock-rates;
};

&blob_1d_imem {
			filename = "ddr4_imem_1d.bin";
};

&blob_1d_dmem {
			filename = "ddr4_dmem_1d.bin";
};

&blob_2d_imem {
			filename = "ddr4_imem_2d.bin";
};

&blob_2d_dmem {
			filename = "ddr4_dmem_2d.bin";
};