// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Toradex Verdin AM62 dts file for R5 SPL
 * Copyright 2023 Toradex - https://www.toradex.com/
 */

#include "k3-am625-verdin-wifi-dev.dts"
#include "k3-am625-verdin-lpddr4-1600MTs.dtsi"
#include "k3-am62-ddr.dtsi"

#include "k3-am625-verdin-wifi-dev-u-boot.dtsi"

/ {
	a53_0: a53@0 {
		compatible = "ti,am654-rproc";
		reg = <0x00 0x00a90000 0x00 0x10>;
		/*
		 * FIXME: Currently only the SPL running on the R5 has a clock
		 * driver. As a workaround therefore move the assigned-clock
		 * stuff required for our ETH_25MHz_CLK from the cpsw3g_mdio
		 * node of the regular device tree to here (last one each in
		 * below three lines, adding a <0> as spacing for parents).
		 */
		assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>, <&k3_clks 157 20>;
		assigned-clock-parents = <&k3_clks 61 2>, <0>, <&k3_clks 157 22>;
		assigned-clock-rates = <200000000>, <1250000000>, <25000000>;
		clocks = <&k3_clks 61 0>;
		power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
				<&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
		resets = <&k3_reset 135 0>;
		ti,sci = <&dmsc>;
		ti,sci-host-id = <10>;
		ti,sci-proc-id = <32>;
		u-boot,dm-spl;
	};

	aliases {
		remoteproc0 = &sysctrler;
		remoteproc1 = &a53_0;
		serial0 = &wkup_uart0;
		serial3 = &main_uart1;
	};

	chosen {
		stdout-path = "serial2:115200n8";
		tick-timer = &timer1;
	};

	dm_tifs: dm-tifs {
		compatible = "ti,j721e-dm-sci";
		mbox-names = "rx", "tx";
		mboxes= <&secure_proxy_main 22>,
			<&secure_proxy_main 23>;
		ti,host-id = <36>;
		ti,secure-host;
		u-boot,dm-spl;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x00000000 0x80000000 0x00000000 0x40000000>; /* 1G RAM */
		u-boot,dm-spl;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};
	};
};

&cbass_main {
	sa3_secproxy: secproxy@44880000 {
		compatible = "ti,am654-secure-proxy";
		#mbox-cells = <1>;
		reg-names = "rt", "scfg", "target_data";
		reg = <0x00 0x44880000 0x00 0x20000>,
		      <0x0 0x44860000 0x0 0x20000>,
		      <0x0 0x43600000 0x0 0x10000>;
		u-boot,dm-spl;
	};

	sysctrler: sysctrler {
		compatible = "ti,am654-system-controller";
		mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>;
		mbox-names = "tx", "rx", "boot_notify";
		u-boot,dm-spl;
	};

	main_esm: esm@420000 {
		compatible = "ti,j721e-esm";
		reg = <0x0 0x420000 0x0 0x1000>;
		ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
		u-boot,dm-spl;
	};
};

&cbass_mcu {
	mcu_esm: esm@4100000 {
		compatible = "ti,j721e-esm";
		reg = <0x0 0x4100000 0x0 0x1000>;
		ti,esm-pins = <0>, <1>, <2>, <85>;
		u-boot,dm-spl;
	};
};

&dmsc {
	mboxes= <&secure_proxy_main 0>,
		<&secure_proxy_main 1>,
		<&secure_proxy_main 0>;
	mbox-names = "rx", "tx", "notify";
	ti,host-id = <35>;
	ti,secure-host;
};

&main_bcdma {
	ti,sci = <&dm_tifs>;
};

&main_pktdma {
	ti,sci = <&dm_tifs>;
};

&main_pmx0 {
	u-boot,dm-spl;

	/* Verdin UART_1 */
	pinctrl_uart1: main-uart1-pins-default {
		pinctrl-single,pins = <
			AM62X_IOPAD(0x0194, PIN_INPUT,  2) /* (B19) MCASP0_AXR3.UART1_CTSn */ /* SODIMM 135 */
			AM62X_IOPAD(0x0198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ /* SODIMM 133 */
			AM62X_IOPAD(0x01ac, PIN_INPUT,  2) /* (E19) MCASP0_AFSR.UART1_RXD  */ /* SODIMM 129 */
			AM62X_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ /* SODIMM 131 */
		>;
		u-boot,dm-spl;
	};
};

/* Verdin UART_1 is used for TIFS firmware logs */
&main_uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
	u-boot,dm-spl;
};

&mcu_pmx0 {
	u-boot,dm-spl;

	/* Verdin UART_2 */
	pinctrl_wkup_uart0: wkup-uart0-pins-default {
		pinctrl-single,pins = <
			AM62X_MCU_IOPAD(0x002c, PIN_INPUT,  0) /* (C6) WKUP_UART0_CTSn */ /* SODIMM 143 */
			AM62X_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */ /* SODIMM 141 */
			AM62X_MCU_IOPAD(0x0024, PIN_INPUT,  0) /* (B4) WKUP_UART0_RXD  */ /* SODIMM 137 */
			AM62X_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD  */ /* SODIMM 139 */
		>;
		u-boot,dm-spl;
	};
};

/* Verdin UART_2 is used for DM firmware logs */
&wkup_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wkup_uart0>;
	status = "okay";
	u-boot,dm-spl;
};