/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2020 Compass Electronics Group, LLC */ #ifndef __IMX8MM_BEACON_H #define __IMX8MM_BEACON_H #include #include #ifdef CONFIG_SECURE_BOOT #define CONFIG_CSF_SIZE SZ_8K #endif #define CONFIG_SPL_MAX_SIZE (148 * 1024) #define CONFIG_SYS_MONITOR_LEN SZ_512K #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_STACK 0x920000 #define CONFIG_SPL_BSS_START_ADDR 0x910000 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CONFIG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #endif /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=Image\0" \ "console=ttymxc1,115200\0" \ "fdt_addr=0x43000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "boot_fit=try\0" \ "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ "initrd_addr=0x43800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcautodetect=yes\0" \ "mmcargs=setenv bootargs console=${console},${baudrate}" \ " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \ "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \ " ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run finduuid; " \ "run mmcargs; " \ "if run loadfdt; then " \ "booti ${loadaddr} - ${fdt_addr}; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "netargs=setenv bootargs console=${console} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ "netboot=echo Booting from net ...; " \ "run netargs; " \ "if test ${ip_dyn} = yes; then " \ "setenv get_cmd dhcp; " \ "else " \ "setenv get_cmd tftp; " \ "fi; " \ "${get_cmd} ${loadaddr} ${image}; " \ "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ "bootm ${loadaddr}; " \ "else " \ "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ "booti ${loadaddr} - ${fdt_addr}; " \ "else " \ "echo WARN: Cannot load the DT; " \ "fi; " \ "fi;\0" #define CONFIG_BOOTCOMMAND \ "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ "if run loadimage; then " \ "run mmcboot; " \ "else run netboot; " \ "fi; " \ "fi; " \ "fi;" /* Link Definitions */ #define CONFIG_LOADADDR 0x40480000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 #define CONFIG_SYS_INIT_RAM_SIZE 0x200000 #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN SZ_32M #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) /* USDHC */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 /* I2C */ #define CONFIG_SYS_I2C_SPEED 100000 /* FEC*/ #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC #define IMX_FEC_BASE 0x30BE0000 #endif