/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2015 Freescale Semiconductor, Inc. * * Configuration settings for the Freescale i.MX7D SABRESD board. */ #ifndef __MX7D_SABRESD_CONFIG_H #define __MX7D_SABRESD_CONFIG_H #include "mx7_common.h" #define PHYS_SDRAM_SIZE SZ_1G #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 /* I2C configs */ #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #ifdef CONFIG_IMX_BOOTAUX /* Set to QSPI1 A flash at default */ #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000 #define UPDATE_M4_ENV \ "m4image=m4_qspi.bin\0" \ "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \ "update_m4_from_sd=" \ "if sf probe 0:0; then " \ "if run loadm4image; then " \ "setexpr fw_sz ${filesize} + 0xffff; " \ "setexpr fw_sz ${fw_sz} / 0x10000; " \ "setexpr fw_sz ${fw_sz} * 0x10000; " \ "sf erase 0x0 ${fw_sz}; " \ "sf write ${loadaddr} 0x0 ${filesize}; " \ "fi; " \ "fi\0" \ "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0" #else #define UPDATE_M4_ENV "" #endif #define CONFIG_MFG_ENV_SETTINGS \ "mfgtool_args=setenv bootargs console=${console},${baudrate} " \ "rdinit=/linuxrc " \ "g_mass_storage.stall=0 g_mass_storage.removable=1 " \ "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\ "g_mass_storage.iSerialNumber=\"\" "\ "clk_ignore_unused "\ "\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffff\0" \ "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \ #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=image raw 0 0x800000;"\ "u-boot raw 0 0x4000;"\ "bootimg part 0 1;"\ "rootfs part 0 2\0" \ #define CONFIG_EXTRA_ENV_SETTINGS \ UPDATE_M4_ENV \ CONFIG_MFG_ENV_SETTINGS \ CONFIG_DFU_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ "finduuid=part uuid mmc 0:1 uuid\0" \ "initrd_high=0xffffffff\0" \ "fdtfile=imx7d-sdb.dtb\0" \ "fdt_addr=0x83000000\0" \ "fdt_addr_r=0x83000000\0" \ "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ "ramdisk_addr_r=0x83100000\0" \ "ramdiskaddr=0x83100000\0" \ "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ BOOTENV #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(DHCP, dhcp, na) \ func(PXE, pxe, na) #include #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* environment organization */ /* * If want to use nand, define CONFIG_NAND_MXS and rework board * to support nand, since emmc has pin conflicts with nand */ #ifdef CONFIG_NAND_MXS /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x40000000 #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_ONFI_DETECTION /* DMA stuff, needed for GPMI/MXS NAND support */ #endif #ifdef CONFIG_NAND_MXS #define CONFIG_SYS_FSL_USDHC_NUM 1 #else #define CONFIG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_IMX_THERMAL #define CONFIG_USBD_HS #ifdef CONFIG_VIDEO #define CONFIG_VIDEO_MXS #define CONFIG_VIDEO_LOGO #define CONFIG_SPLASH_SCREEN #define CONFIG_SPLASH_SCREEN_ALIGN #define CONFIG_BMP_16BPP #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_VIDEO_BMP_LOGO #endif #endif /* __CONFIG_H */