/* * Configuration for Xilinx ZynqMP zc1751 XM019 DC5 * * (C) Copyright 2015 Xilinx, Inc. * Siva Durga Prasad * Michal Simek * * SPDX-License-Identifier: GPL-2.0+ */ #ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H #define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H #define CONFIG_ZYNQ_SDHCI0 #include #endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */