summaryrefslogtreecommitdiff
path: root/arch/arm/cpu/arm926ejs/davinci/et1011c.c
blob: da073457a30a5092f352c19176cc622facdd8f4d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
/*
 * LSI ET1011C PHY Driver for TI DaVinci(TMS320DM6467) board.
 *
 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <common.h>
#include <net.h>
#include <miiphy.h>
#include <asm/arch/emac_defs.h>

#ifdef CONFIG_DRIVER_TI_EMAC

#ifdef CONFIG_CMD_NET

/* LSI PHYSICAL LAYER TRANSCEIVER ET1011C */

#define MII_PHY_CONFIG_REG		22

/* PHY Config bits */
#define PHY_SYS_CLK_EN			(1 << 4)

int et1011c_get_link_speed(int phy_addr)
{
	u_int16_t	data;

	if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) {
		davinci_eth_phy_read(EMAC_MDIO_PHY_NUM,
				MII_PHY_CONFIG_REG, &data);
		/* Enable 125MHz clock sourced from PHY */
		davinci_eth_phy_write(EMAC_MDIO_PHY_NUM,
			MII_PHY_CONFIG_REG,
			data | PHY_SYS_CLK_EN);
		return (1);
	}
	return (0);
}

#endif	/* CONFIG_CMD_NET */

#endif	/* CONFIG_DRIVER_ETHER */