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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 NXP
*/
/dts-v1/;
#include "imx8ulp.dtsi"
/ {
model = "NXP i.MX8ULP WATCH";
compatible = "fsl,imx8ulp-watch", "fsl,imx8ulp";
chosen {
stdout-path = &lpuart5;
bootargs = "console=ttyLP1,115200 earlycon";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0 0x28000000>;
linux,cma-default;
};
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
&clock_ext_ts {
/* External ts clock is 50MHZ from PHY on EVK board. */
clock-frequency = <50000000>;
};
&lpuart5 {
/* console */
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_lpuart5>;
pinctrl-1 = <&pinctrl_lpuart5>;
status = "okay";
};
&usbotg1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_otgid1>;
pinctrl-1 = <&pinctrl_otgid1>;
dr_mode = "otg";
hnp-disable;
srp-disable;
adp-disable;
over-current-active-low;
status = "okay";
};
&usbphy1 {
status = "okay";
};
&usbmisc1 {
status = "okay";
};
&usdhc0 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc0>;
pinctrl-1 = <&pinctrl_usdhc0>;
pinctrl-2 = <&pinctrl_usdhc0>;
pinctrl-3 = <&pinctrl_usdhc0>;
non-removable;
bus-width = <8>;
status = "okay";
};
&iomuxc1 {
pinctrl_lpuart5: lpuart5grp {
fsl,pins = <
MX8ULP_PAD_PTF14__LPUART5_TX 0x3
MX8ULP_PAD_PTF15__LPUART5_RX 0x3
>;
};
pinctrl_otgid1: usb1grp {
fsl,pins = <
MX8ULP_PAD_PTE16__USB0_ID 0x10003
>;
};
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
MX8ULP_PAD_PTD1__SDHC0_CMD 0x3
MX8ULP_PAD_PTD2__SDHC0_CLK 0x10002
MX8ULP_PAD_PTD10__SDHC0_D0 0x3
MX8ULP_PAD_PTD9__SDHC0_D1 0x3
MX8ULP_PAD_PTD8__SDHC0_D2 0x3
MX8ULP_PAD_PTD7__SDHC0_D3 0x3
MX8ULP_PAD_PTD6__SDHC0_D4 0x3
MX8ULP_PAD_PTD5__SDHC0_D5 0x3
MX8ULP_PAD_PTD4__SDHC0_D6 0x3
MX8ULP_PAD_PTD3__SDHC0_D7 0x3
MX8ULP_PAD_PTD11__SDHC0_DQS 0x10002
>;
};
};
&dsi {
status = "okay";
panel@0 {
compatible = "usmp,rm67162";
reg = <0>;
dsi-lanes = <1>;
reset,otherway;
vcc-supply = <®_5v>;
iovcc-supply = <®_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&mipi_dsi_out>;
};
};
};
ports {
port@1 {
reg = <1>;
mipi_dsi_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&dcnano {
status = "okay";
};
&dphy {
status = "okay";
};
&usbotg2 {
status = "disabled";
};
|
