summaryrefslogtreecommitdiff
path: root/arch/arm/include/asm/arch-tegra20/gpio.h
blob: af301e7150f8f7ae6af111ef0d2ae1b93ffb79cb (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
/*
 * Copyright (c) 2011, Google Inc. All rights reserved.
 * Portions Copyright 2011-2012 NVIDIA Corporation
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _TEGRA20_GPIO_H_
#define _TEGRA20_GPIO_H_

/*
 * The Tegra 2x GPIO controller has 224 GPIOs arranged in 7 banks of 4 ports,
 * each with 8 GPIOs.
 */
#define TEGRA_GPIO_PORTS	4	/* number of ports per bank */
#define TEGRA_GPIO_BANKS	7	/* number of banks */

#include <asm/arch-tegra/gpio.h>

/* GPIO Controller registers for a single bank */
struct gpio_ctlr_bank {
	uint gpio_config[TEGRA_GPIO_PORTS];
	uint gpio_dir_out[TEGRA_GPIO_PORTS];
	uint gpio_out[TEGRA_GPIO_PORTS];
	uint gpio_in[TEGRA_GPIO_PORTS];
	uint gpio_int_status[TEGRA_GPIO_PORTS];
	uint gpio_int_enable[TEGRA_GPIO_PORTS];
	uint gpio_int_level[TEGRA_GPIO_PORTS];
	uint gpio_int_clear[TEGRA_GPIO_PORTS];
};

struct gpio_ctlr {
	struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS];
};

#endif	/* TEGRA20_GPIO_H_ */