board/freescale/imx8mm_evk/ddr/ddr4/Makefile


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#
# Copyright 2018 NXP
#
# SPDX-License-Identifier:      GPL-2.0+
#

ifdef CONFIG_SPL_BUILD
obj-y += ddr4_phyinit_task.o
obj-y += ddr4_phyinit_2400_400_100_2r_fw09.o
obj-y += ddr4_swffc_fw09.o
obj-y += save_1d2d_trained_csr_ddr4_p012.o
obj-y += restore_1d2d_trained_csr_ddr4_p012.o
endif