summaryrefslogtreecommitdiff
path: root/drivers/gpio/mvebu_gpio.c
blob: 75dc73e5860b61be65e90ba165526e30ac6b009d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
/*
 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <dm.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <errno.h>

DECLARE_GLOBAL_DATA_PTR;

#define MVEBU_GPIOS_PER_BANK	32

struct mvebu_gpio_regs {
	u32 data_out;
	u32 io_conf;
	u32 blink_en;
	u32 in_pol;
	u32 data_in;
};

struct mvebu_gpio_priv {
	struct mvebu_gpio_regs *regs;
	char name[2];
};

static int mvebu_gpio_direction_input(struct udevice *dev, unsigned int gpio)
{
	struct mvebu_gpio_priv *priv = dev_get_priv(dev);
	struct mvebu_gpio_regs *regs = priv->regs;

	setbits_le32(&regs->io_conf, BIT(gpio));

	return 0;
}

static int mvebu_gpio_direction_output(struct udevice *dev, unsigned gpio,
				       int value)
{
	struct mvebu_gpio_priv *priv = dev_get_priv(dev);
	struct mvebu_gpio_regs *regs = priv->regs;

	if (value)
		setbits_le32(&regs->data_out, BIT(gpio));
	else
		clrbits_le32(&regs->data_out, BIT(gpio));
	clrbits_le32(&regs->io_conf, BIT(gpio));

	return 0;
}

static int mvebu_gpio_get_function(struct udevice *dev, unsigned gpio)
{
	struct mvebu_gpio_priv *priv = dev_get_priv(dev);
	struct mvebu_gpio_regs *regs = priv->regs;
	u32 val;

	val = readl(&regs->io_conf) & BIT(gpio);
	if (val)
		return GPIOF_INPUT;
	else
		return GPIOF_OUTPUT;
}

static int mvebu_gpio_set_value(struct udevice *dev, unsigned gpio,
				int value)
{
	struct mvebu_gpio_priv *priv = dev_get_priv(dev);
	struct mvebu_gpio_regs *regs = priv->regs;

	if (value)
		setbits_le32(&regs->data_out, BIT(gpio));
	else
		clrbits_le32(&regs->data_out, BIT(gpio));

	return 0;
}

static int mvebu_gpio_get_value(struct udevice *dev, unsigned gpio)
{
	struct mvebu_gpio_priv *priv = dev_get_priv(dev);
	struct mvebu_gpio_regs *regs = priv->regs;

	return !!(readl(&regs->data_in) & BIT(gpio));
}

static int mvebu_gpio_probe(struct udevice *dev)
{
	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
	struct mvebu_gpio_priv *priv = dev_get_priv(dev);

	priv->regs = (struct mvebu_gpio_regs *)dev_get_addr(dev);
	uc_priv->gpio_count = MVEBU_GPIOS_PER_BANK;
	priv->name[0] = 'A' + dev->req_seq;
	uc_priv->bank_name = priv->name;

	return 0;
}

static const struct dm_gpio_ops mvebu_gpio_ops = {
	.direction_input	= mvebu_gpio_direction_input,
	.direction_output	= mvebu_gpio_direction_output,
	.get_function		= mvebu_gpio_get_function,
	.get_value		= mvebu_gpio_get_value,
	.set_value		= mvebu_gpio_set_value,
};

static const struct udevice_id mvebu_gpio_ids[] = {
	{ .compatible = "marvell,orion-gpio" },
	{ }
};

U_BOOT_DRIVER(gpio_mvebu) = {
	.name			= "gpio_mvebu",
	.id			= UCLASS_GPIO,
	.of_match		= mvebu_gpio_ids,
	.ops			= &mvebu_gpio_ops,
	.probe			= mvebu_gpio_probe,
	.priv_auto_alloc_size	= sizeof(struct mvebu_gpio_priv),
};