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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2020 NXP
*/
#ifndef __IMX8DXL_EVK_H
#define __IMX8DXL_EVK_H
#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
#include "imx_env.h"
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_MAX_SIZE (128 * 1024)
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1040 /* (32K + 2Mb)/sector_size */
/*
* 0x08081000 - 0x08180FFF is for m4_0 xip image,
* So 3rd container image may start from 0x8181000
*/
#define CONFIG_SYS_UBOOT_BASE 0x08181000
#define CONFIG_SYS_NAND_U_BOOT_OFFS (0x8000000) /*Put the FIT out of first 128MB boot area */
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_IDENT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
/*
* The memory layout on stack: DATA section save + gd + early malloc
* the idea is re-use the early malloc (CONFIG_SYS_MALLOC_F_LEN) with
* CONFIG_SYS_SPL_MALLOC_START
*/
#define CONFIG_SPL_STACK 0x822ffff0
#define CONFIG_SPL_BSS_START_ADDR 0x82280000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x82200000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
#define CONFIG_MALLOC_F_ADDR 0x82200000
#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#endif
#define CONFIG_REMAKE_ELF
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_CMD_READ
/* Flat Device Tree Definitions */
#define CONFIG_OF_BOARD_SETUP
#undef CONFIG_CMD_EXPORTENV
#undef CONFIG_CMD_IMPORTENV
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_CRC32
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000
#define USDHC2_BASE_ADDR 0x5B020000
#define CONFIG_ENV_OVERWRITE
#define CONFIG_PCIE_IMX
#define CONFIG_CMD_PCI
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#ifdef CONFIG_AHAB_BOOT
#define AHAB_ENV "sec_boot=yes\0"
#else
#define AHAB_ENV "sec_boot=no\0"
#endif
/* Boot M4 */
#define M4_BOOT_ENV \
"m4_0_image=m4_0.bin\0" \
"loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
"m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
#ifdef CONFIG_NAND_BOOT
#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(nandboot),16m(nandfit),32m(nandkernel),16m(nanddtb),8m(nandtee),-(nandrootfs)"
#endif
#define CONFIG_MFG_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS_DEFAULT \
"initrd_addr=0x83100000\0" \
"initrd_high=0xffffffffffffffff\0" \
"emmc_dev=0\0" \
"sd_dev=1\0" \
#define JAILHOUSE_ENV \
"jh_mmcboot=" \
"setenv fdt_file imx8dxl-evk-root.dtb;"\
"setenv boot_os 'scu_rm dtb ${fdt_addr}; booti ${loadaddr} - ${fdt_addr};'; " \
"run mmcboot; \0" \
"jh_netboot=" \
"setenv fdt_file imx8dxl-evk-root.dtb;"\
"setenv boot_os 'scu_rm dtb ${fdt_addr}; booti ${loadaddr} - ${fdt_addr};'; " \
"run netboot; \0"
#define XEN_BOOT_ENV \
"xenhyper_bootargs=console=dtuart dtuart=/serial@5a060000 dom0_mem=1024M dom0_max_vcpus=2 dom0_vcpus_pin=true\0" \
"xenlinux_bootargs= \0" \
"xenlinux_console=hvc0 earlycon=xen\0" \
"xenlinux_addr=0x9e000000\0" \
"dom0fdt_file=imx8dxl-evk-dom0.dtb\0" \
"xenboot_common=" \
"${get_cmd} ${loadaddr} xen;" \
"${get_cmd} ${fdt_addr} ${dom0fdt_file};" \
"${get_cmd} ${xenlinux_addr} ${image};" \
"fdt addr ${fdt_addr};" \
"fdt resize 256;" \
"fdt set /chosen/module@0 reg <0x00000000 ${xenlinux_addr} 0x00000000 0x${filesize}>; " \
"fdt set /chosen/module@0 bootargs \"${bootargs} ${xenlinux_bootargs}\"; " \
"setenv bootargs ${xenhyper_bootargs};" \
"booti ${loadaddr} - ${fdt_addr};" \
"\0" \
"xennetboot=" \
"setenv get_cmd dhcp;" \
"setenv console ${xenlinux_console};" \
"run netargs;" \
"run xenboot_common;" \
"\0" \
"xenmmcboot=" \
"setenv get_cmd \"fatload mmc ${mmcdev}:${mmcpart}\";" \
"setenv console ${xenlinux_console};" \
"run mmcargs;" \
"run xenboot_common;" \
"\0" \
/* Initial environment variables */
#ifdef CONFIG_NAND_BOOT
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
"bootargs=console=ttyLP0,115200 ubi.mtd=nandrootfs " \
"root=ubi0:nandrootfs rootfstype=ubifs " \
MFG_NAND_PARTITION \
"\0"\
"console=ttyLP0,115200 earlycon\0" \
"mtdparts=" MFG_NAND_PARTITION "\0" \
"fdt_addr=0x83000000\0"
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_MFG_ENV_SETTINGS \
M4_BOOT_ENV \
XEN_BOOT_ENV \
JAILHOUSE_ENV\
AHAB_ENV \
"script=boot.scr\0" \
"image=Image\0" \
"splashimage=0x9e000000\0" \
"console=ttyLP0\0" \
"fdt_addr=0x83000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"cntr_addr=0x98000000\0" \
"cntr_file=os_cntr_signed.bin\0" \
"boot_fdt=try\0" \
"fdt_file=undefined\0" \
"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
"mmcautodetect=yes\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} earlycon root=${mmcroot}\0 " \
"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}\0" \
"auth_os=auth_cntr ${cntr_addr}\0" \
"boot_os=booti ${loadaddr} - ${fdt_addr};\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"if test ${sec_boot} = yes; then " \
"if run auth_os; then " \
"run boot_os; " \
"else " \
"echo ERR: failed to authenticate; " \
"fi; " \
"else " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"run boot_os; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"else " \
"echo wait for boot; " \
"fi;" \
"fi;\0" \
"netargs=setenv bootargs console=${console},${baudrate} earlycon " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
"if test ${ip_dyn} = yes; then " \
"setenv get_cmd dhcp; " \
"else " \
"setenv get_cmd tftp; " \
"fi; " \
"if test ${sec_boot} = yes; then " \
"${get_cmd} ${cntr_addr} ${cntr_file}; " \
"if run auth_os; then " \
"run boot_os; " \
"else " \
"echo ERR: failed to authenticate; " \
"fi; " \
"else " \
"${get_cmd} ${loadaddr} ${image}; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
"run boot_os; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"else " \
"booti; " \
"fi;" \
"fi;\0"
#endif
#ifdef CONFIG_NAND_BOOT
#define CONFIG_BOOTCOMMAND \
"nand read ${loadaddr} 0x9000000 0x2000000;"\
"nand read ${fdt_addr} 0xB000000 0x100000;"\
"booti ${loadaddr} - ${fdt_addr}"
#else
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if test ${sec_boot} = yes; then " \
"if run loadcntr; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"else " \
"if run loadimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"fi; " \
"else booti ${loadaddr} - ${fdt_addr}; fi"
#endif
/* Link Definitions */
#define CONFIG_LOADADDR 0x80280000
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
#ifdef CONFIG_QSPI_BOOT
#define CONFIG_ENV_SECT_SIZE (128 * 1024)
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#else
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#endif
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* USDHC2 for SD */
#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
#define CONFIG_SYS_FSL_USDHC_NUM 2
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_2 0x880000000
/* total DDR is 1GB */
#if defined(CONFIG_TARGET_IMX8DXL_DDR3_EVK)
#define PHYS_SDRAM_1_SIZE 0x1FF00000 /* 512MB - ECC region 1MB */
#else
#define PHYS_SDRAM_1_SIZE 0x3FE00000 /* 1 GB - ECC region 2MB */
#endif
#define PHYS_SDRAM_2_SIZE 0x00000000
#define CONFIG_SYS_MEMTEST_START 0xA0000000
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_1_SIZE >> 2))
/* Serial */
#define CONFIG_BAUDRATE 115200
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#ifndef CONFIG_DM_PCA953X
#define CONFIG_PCA953X
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
#endif
/* MT35XU512ABA1G12 has only one Die, so QSPI0 B won't work */
#ifdef CONFIG_FSL_FSPI
#define FSL_FSPI_FLASH_SIZE SZ_64M
#define FSL_FSPI_FLASH_NUM 1
#define FSPI0_BASE_ADDR 0x5d120000
#define FSPI0_AMBA_BASE 0
#endif
#define CONFIG_SERIAL_TAG
#ifdef CONFIG_NAND_MXS
#define CONFIG_CMD_NAND_TRIMFFS
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#endif
/* USB Config */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#define CONFIG_USBD_HS
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#endif
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
/* USB OTG controller configs */
#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif
/* Networking */
#define CONFIG_FEC_XCV_TYPE RGMII
#define FEC_QUIRK_ENET_MAC
#define CONFIG_FEC_MXC_PHYADDR 0x1
#define DWC_NET_PHYADDR 0
#ifdef CONFIG_DWC_ETH_QOS
#define CONFIG_SYS_NONCACHED_MEMORY (1 * SZ_1M) /* 1M */
#endif
#define CONFIG_ETHPRIME "eth1"
#define PHY_ANEG_TIMEOUT 20000
#if defined(CONFIG_DM_VIDEO)
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_LINK
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_BMP_24BPP
#define CONFIG_BMP_32BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
#endif
#endif /* __IMX8DXL_EVK_H */
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