blob: 46bc5b0c97ac9027cb92d19395308ddaafca1780 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
|
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Configuration settings for the Freescale i.MX7D 12x12 DDR3 ARM2 board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX7D_12X12_DDR3_ARM2_CONFIG_H
#define __MX7D_12X12_DDR3_ARM2_CONFIG_H
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC3 */
#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC3 */
#define PHYS_SDRAM_SIZE SZ_1G
#ifdef CONFIG_SPI_BOOT
#define CONFIG_MXC_SPI
#endif
#ifdef CONFIG_MXC_SPI
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_ATMEL
#define CONFIG_SF_DEFAULT_BUS 3
#define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#define CONFIG_SF_DEFAULT_CS 0
#endif
#include "mx7d_arm2.h"
#endif
|
