diff options
| author | Haibo Chen <haibo.chen@freescale.com> | 2015-04-16 17:04:46 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2015-05-08 17:24:50 +0800 |
| commit | a7f6a856ccdf74c282ded5898281f74755120e84 (patch) | |
| tree | 80a93302cda9de15e30f3ac4fc378b47bbf5aa3c | |
| parent | fddb559446feb05f08a80ba7f582efbd26c92059 (diff) | |
MLK-10672 mmc: sdhci-esdhc-imx: set back the burst_length_enable bit to 1
Currently we find that if a usdhc is choosed to boot system, then ROM
code will set the burst length enable bit of this usdhc as 0.
This will make performance drop a lot if this usdhc's burst length is
16. So this patch set back the burst_length_enable bit as 1, which is
the default value, and means burst length is enabled for INCR.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
| -rw-r--r-- | drivers/mmc/host/sdhci-esdhc-imx.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index 708308db4ef7..2759d6ba6f81 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -33,6 +33,7 @@ #include "sdhci-esdhc.h" #define ESDHC_CTRL_D3CD 0x08 +#define ESDHC_BURST_LEN_EN_INCR (1 << 27) /* VENDOR SPEC register */ #define ESDHC_VENDOR_SPEC 0xc0 #define ESDHC_VENDOR_SPEC_SDIO_QUIRK (1 << 1) @@ -1144,6 +1145,17 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) writel(0x10401040, host->ioaddr + ESDHC_WTMK_LVL); else writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL); + + /* + * ROM code will change the burst_length_enable setting to + * zero if this usdhc is choosed to boot system. Change it + * back here, otherwise it will impact the performance a + * lot if the burst length is 16. + */ + writel(readl(host->ioaddr + SDHCI_HOST_CONTROL) + | ESDHC_BURST_LEN_EN_INCR, + host->ioaddr + SDHCI_HOST_CONTROL); + host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER; host->mmc->caps |= MMC_CAP_1_8V_DDR; |