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authorGao Pan <gaopan@freescale.com>2015-06-11 11:33:13 +0800
committerGao Pan <gaopan@freescale.com>2015-06-12 16:20:56 +0800
commitaaf0fc93a5455abe9fdb2d13f7e934c59ab8c4ba (patch)
tree8dddaaec9be793fce387393b54b9fe3d6aa651a5
parent34ff6ab4e6af5e87eb3edc0420b204bf09e859e6 (diff)
MLK-11098: arm: imx: set imx6qp eim_slow to 132Mhz
eim_slow is 66MHz on imx6qp and 132MHz on imx6q. As a result, imx6qp weim nor read performance is half of imx6q. To eliminate the performance difference, imx6qp eim_slow is set to 132Mhz. Signed-off-by: Gao Pan <b54642@freescale.com>
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index e6d82a2fcf63..d9e97193b062 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -650,6 +650,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
if (IS_ENABLED(CONFIG_PCI_IMX6))
imx_clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF]);
+ /* set eim_slow to 132Mhz */
+ imx_clk_set_rate(clk[IMX6QDL_CLK_EIM_SLOW], 132000000);
+
/*
* Enable clocks only after both parent and rate are all initialized
* as needed