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authorMax Krummenacher <max.krummenacher@toradex.com>2021-02-13 14:17:39 +0100
committerMax Krummenacher <max.krummenacher@toradex.com>2021-02-17 17:44:32 +0100
commite0329b50328de618555382cd157cfe34017e8d76 (patch)
tree75fe3ea60d39083d3c4b0c33738ff72240636738
parent21526f7f63ede07d78a88f4bfd11ab9ea51d76f8 (diff)
arm64: dts: imx8mm-verdin: adapt to changed pins for dsi-adapters
The carrier boards V1.1 changed the pins used for the MIPI-DSI adapters. Adapt to the changed pin usage for the DSI to LVDS and DSI to HDMI adapters. Verdin GPIO_1 and GPIO_2 are no longer used for the adapters. DSI to LVDS Touch reset now connected to SODIMM 42 Touch irq and LVDS controller irq now wired or connected to SODIMM 17 Backlight enable now connected to SODIMM 46 LVDS controller enable now connected to SODIMM 21 DSI to HDMI HDMI controller irq newly available on SODIMM 17 HDMI controller reset now connected on SODIMM 21 Hot plug detect now connected to SODIMM 19 Related-to: ELB-3488 Related-to: ELB-3490 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
-rwxr-xr-xarch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi71
1 files changed, 41 insertions, 30 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index 7ee29266a239..f2664f56d778 100755
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -21,8 +21,8 @@
compatible = "pwm-backlight";
brightness-levels = <0 45 63 88 119 158 203 255>;
default-brightness-level = <4>;
- /* Verdin MEZ_DSI_1_BKL_EN (SODIMM 21) */
- enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
+ /* Verdin MEZ_DSI_1_BKL_EN (SODIMM 46) */
+ enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mez_dsi_1_bkl_en>;
power-supply = <&reg_3p3v>;
@@ -556,10 +556,9 @@
lvds_ti_sn65dsi83: bridge@2c {
compatible = "ti,sn65dsi83";
- /* Verdin MEZ_GPIO_1 (SODIMM 206) */
- enable-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mez_gpio1>;
+ pinctrl-0 = <&pinctrl_mez_dsi_1_gpio10>, <&pinctrl_mez_dsi_1_int_n>;
reg = <0x2c>;
status = "disabled";
ti,dsi-lanes = <4>;
@@ -602,27 +601,25 @@
hdmi_lontium_lt8912: hdmi@48 {
compatible = "lontium,lt8912";
ddc-i2c-bus = <&i2c2>;
- /* Verdin MEZ_DSI_1_INT HPD (SODIMM 17) shared with MEZ_GPIO_1 (SODIMM 206) */
- hpd-gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+ /* Verdin MEZ_DSI_1_INT HPD (SODIMM 19) */
+ hpd-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mez_dsi_1_int_hpd>, <&pinctrl_mez_gpio1>,
- <&pinctrl_mez_gpio2>;
+ pinctrl-0 = <&pinctrl_mez_dsi_1_gpio10>, <&pinctrl_mez_dsi_1_hpd>;
reg = <0x48>;
- /* Verdin MEZ_GPIO_2 (SODIMM 208) */
- reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
+ reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
status = "disabled";
};
atmel_mxt_ts: touch@4a {
compatible = "atmel,maxtouch";
- /* Verdin MEZ_DSI_1_INT# (SODIMM 17) */
+ /* Verdin MEZ_DSI_1_INT# (SODIMM 17) shared. Pinctrl by &lvds_ti_sn65dsi83 */
interrupt-parent = <&gpio3>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mez_dsi_1_int_n>, <&pinctrl_mez_gpio2>;
+ pinctrl-0 = <&pinctrl_mez_touchreset>;
reg = <0x4a>;
- /* Verdin MEZ_GPIO_2 (SODIMM 208) */
- reset-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
/* temperature sensor on carrier board */
@@ -821,10 +818,11 @@
&iomuxc {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio3>, <&pinctrl_gpio4>, <&pinctrl_gpio7>,
- <&pinctrl_gpio8>, <&pinctrl_gpio_hog1>,
- <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>,
- <&pinctrl_sai5>, <&pinctrl_pmic_tpm_ena>;
+ pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
+ <&pinctrl_gpio3>, <&pinctrl_gpio4>,
+ <&pinctrl_gpio7>, <&pinctrl_gpio8>,
+ <&pinctrl_gpio_hog1>, <&pinctrl_gpio_hog2>, <&pinctrl_gpio_hog3>,
+ <&pinctrl_pmic_tpm_ena>;
pinctrl_can1_int: can1intgrp {
fsl,pins = <
@@ -916,6 +914,18 @@
>;
};
+ pinctrl_gpio1: gpio1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x184 /* SODIMM 206 */
+ >;
+ };
+
+ pinctrl_gpio2: gpio2grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x1c4 /* SODIMM 208 */
+ >;
+ };
+
pinctrl_gpio3: gpio3grp {
fsl,pins = <
MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26 0x184 /* SODIMM 210 */
@@ -1054,14 +1064,22 @@
/* Verdin MEZ_DSI_1_BKL_EN */
pinctrl_mez_dsi_1_bkl_en: mezdsi1bklengrp {
fsl,pins = <
+ MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x184 /* SODIMM 46 */
+ >;
+ };
+
+ /* Verdin MEZ_DSI_1_GPIO_10 */
+ pinctrl_mez_dsi_1_gpio10: mezdsi1gpio10grp {
+ fsl,pins = <
MX8MM_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x1c4 /* SODIMM 21 */
>;
};
/* Verdin MEZ_DSI_1_INT HPD (pulled-down as active-high) */
- pinctrl_mez_dsi_1_int_hpd: mezdsi1inthpdgrp {
+ pinctrl_mez_dsi_1_hpd: mezdsi1hpdgrp {
fsl,pins = <
- MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 0x184 /* SODIMM 17 */
+ MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x184 /* SODIMM 19 */
+
>;
};
@@ -1072,16 +1090,9 @@
>;
};
- /* MEZ_GPIO_1 shared with MEZ_DSI_1_INT on Verdin DSI to HDMI Display Adapter */
- pinctrl_mez_gpio1: mezgpio1grp {
+ pinctrl_mez_touchreset: meztouchresetgrp {
fsl,pins = <
- MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x184 /* SODIMM 206 */
- >;
- };
-
- pinctrl_mez_gpio2: mezgpio2grp {
- fsl,pins = <
- MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x1c4 /* SODIMM 208 */
+ MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x184 /* SODIMM 42 */
>;
};