diff options
| author | Alex Frid <afrid@nvidia.com> | 2014-01-16 19:04:23 -0800 |
|---|---|---|
| committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2014-02-07 12:20:37 -0800 |
| commit | fe7282d07689b00c1efdff8ac038970e133d1c24 (patch) | |
| tree | ed1f96e87a9651ac3f512eac652092f035928009 /arch/arm/mach-tegra/tegra_cl_dvfs.c | |
| parent | bcd195df95509e502c619e386dd4d7842ecca0dd (diff) | |
ARM: tegra: dvfs: Apply guard-band to tuning threshold
Applied PMIC undershoot guard-band to tuning threshold. Although
tuning start hysteresis already effectively provides such guard band
the values of these two parameters are driven by different h/w: power
tree for undershoot guard band and SoC characterization for tuning
start hysteresis. Hence, this commit.
Bug 1285525
Change-Id: I3c5a9fda8aa1499b249a3384e29003edfcbcb00c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/356918
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra_cl_dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra_cl_dvfs.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra_cl_dvfs.c b/arch/arm/mach-tegra/tegra_cl_dvfs.c index 4af38260737e..db4726905601 100644 --- a/arch/arm/mach-tegra/tegra_cl_dvfs.c +++ b/arch/arm/mach-tegra/tegra_cl_dvfs.c @@ -728,6 +728,7 @@ static void set_ol_config(struct tegra_cl_dvfs *cld) cl_dvfs_writel(cld, val, CL_DVFS_FREQ_REQ); } +static void cl_dvfs_set_force_out_min(struct tegra_cl_dvfs *cld); static void set_cl_config(struct tegra_cl_dvfs *cld, struct dfll_rate_req *req) { u32 out_max, out_min; @@ -738,6 +739,7 @@ static void set_cl_config(struct tegra_cl_dvfs *cld, struct dfll_rate_req *req) if (out_cap > cld->tune_high_out_start) { set_tune_state(cld, TEGRA_CL_DVFS_TUNE_HIGH_REQUEST); mod_timer(&cld->tune_timer, jiffies + cld->tune_delay); + cl_dvfs_set_force_out_min(cld); } break; @@ -746,6 +748,7 @@ static void set_cl_config(struct tegra_cl_dvfs *cld, struct dfll_rate_req *req) if (out_cap <= cld->tune_high_out_start) { set_tune_state(cld, TEGRA_CL_DVFS_TUNE_LOW); tune_low(cld); + cl_dvfs_set_force_out_min(cld); } break; default: @@ -1021,16 +1024,15 @@ static void cl_dvfs_set_dvco_rate_min(struct tegra_cl_dvfs *cld) static void cl_dvfs_set_force_out_min(struct tegra_cl_dvfs *cld) { - u8 force_out_min = get_output_bottom(cld); + u8 force_out_min; int force_mv_min = cld->p_data->pmu_undershoot_gb; if (!force_mv_min) { - cld->force_out_min = force_out_min; + cld->force_out_min = get_output_bottom(cld); return; } - if (cld->therm_floor_idx < cld->therm_floors_num) - force_out_min = cld->thermal_out_floors[cld->therm_floor_idx]; + force_out_min = get_output_min(cld); force_mv_min += get_mv(cld, force_out_min); force_out_min = find_mv_out_cap(cld, force_mv_min); if (force_out_min == cld->safe_output) |