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From 9bfdb183a7c50266caa97e5fcbabeaf54db6c2a1 Mon Sep 17 00:00:00 2001
From: Alexandre Courbot <acourbot@nvidia.com>
Date: Tue, 20 Sep 2016 11:33:51 +0900
Subject: [PATCH] sync kernel UAPI
---
include/drm/drm_fourcc.h | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/include/drm/drm_fourcc.h b/include/drm/drm_fourcc.h
index 4d8da69..7fed8a2 100644
--- a/include/drm/drm_fourcc.h
+++ b/include/drm/drm_fourcc.h
@@ -26,6 +26,10 @@
#include "drm.h"
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
((__u32)(c) << 16) | ((__u32)(d) << 24))
@@ -229,4 +233,23 @@
*/
#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
+
+/* NVIDIA Frame buffer modifiers */
+
+#define NV_FORMAT_MOD_TEGRA_SHIFT 32
+
+#define NV_FORMAT_MOD_TEGRA_TILED \
+ fourcc_mod_code(NV, 1ULL << NV_FORMAT_MOD_TEGRA_SHIFT)
+
+#define NV_FORMAT_MOD_TEGRA_BLOCK_MASK \
+ fourcc_mod_code(NV, 2ULL << NV_FORMAT_MOD_TEGRA_SHIFT)
+#define NV_FORMAT_MOD_TEGRA_BLOCK_VALUE(m) \
+ (m & ((1ULL << NV_FORMAT_MOD_TEGRA_SHIFT) - 1))
+#define NV_FORMAT_MOD_TEGRA_BLOCK(v) \
+ (NV_FORMAT_MOD_TEGRA_BLOCK_MASK | NV_FORMAT_MOD_TEGRA_BLOCK_VALUE(v))
+
+#if defined(__cplusplus)
+}
+#endif
+
#endif /* DRM_FOURCC_H */
--
2.9.3
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