blob: ae1f3fa3999e67524633ed18d1b8fa749663d8b2 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
|
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
// Enable RPMSG and the M4 driver
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/imx8mm-clock.h>
/ {
compatible = "toradex,verdin-imx8mm";
};
&{/} {
imx8mm-cm4 {
compatible = "fsl,imx8mm-cm4";
rsc-da = <0xb8000000>;
clocks = <&clk IMX8MM_CLK_M4_DIV>;
mbox-names = "tx", "rx", "rxdb";
mboxes = <&mu 0 1
&mu 1 1
&mu 3 1>;
memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>, <&m4_reserved>;
syscon = <&src>;
fsl,startup-delay-ms = <500>;
};
};
&uart4 {
status = "disabled";
};
&resmem {
#address-cells = <2>;
#size-cells = <2>;
m4_reserved: m4@0x80000000 {
no-map;
reg = <0 0x80000000 0 0x1000000>;
};
vdev0vring0: vdev0vring0@b8000000 {
reg = <0 0xb8000000 0 0x8000>;
no-map;
};
vdev0vring1: vdev0vring1@b8008000 {
reg = <0 0xb8008000 0 0x8000>;
no-map;
};
rsc_table: rsc_table@b80ff000 {
reg = <0 0xb80ff000 0 0x1000>;
no-map;
};
vdevbuffer: vdevbuffer@b8400000 {
compatible = "shared-dma-pool";
reg = <0 0xb8400000 0 0x100000>;
no-map;
};
};
|
