camera-support:Change the frequencies

Change the frequencies for the pll4 (clock.c)
Change the frequencies for the different phytec camera moduls (board-mx6q_phyflex.c)
Add new pll configs for the mt9p031 sensor (mt9p031.c)

Signed-off-by: Christian Hemp <c.hemp@phytec.de>

3 files changed, 31 insertions, 27 deletions

diff --git a/arch/arm/mach-mx6/board-mx6q_phyflex.c b/arch/arm/mach-mx6/board-mx6q_phyflex.c
index 74bb24f8ae99..0ae55bcf4095 100644
--- a/arch/arm/mach-mx6/board-mx6q_phyflex.c
+++ b/arch/arm/mach-mx6/board-mx6q_phyflex.c
@@ -131,7 +131,7 @@
 #define MX6_PHYCARD_CAP_TCH_INT0	IMX_GPIO_NR(4, 29)
 
 #define MX6_PHYFLEX_CAP_TCH_INT0	IMX_GPIO_NR(5, 8)
-#define MX6_PHYFLEX_CAP_TCH_INT1	IMX_GPIO_NR(2, 23)
+#define MX6_PHYFLEX_CAP_TCH_INT1	IMX_GPIO_NR(5, 7)
 #define MX6_PHYFLEX_KAPA_TOUCH_INT0	IMX_GPIO_NR(7, 12)
  
 #define MX6_PHYFLEX_DISP0_DET_INT	IMX_GPIO_NR(3, 31)
@@ -1019,15 +1019,15 @@ static struct mxc_camera_pdata mxc_ipu_csi_pdata[] = {
 		.flags = MXC_CAMERA_DATAWIDTH_10,
 		.ipu = 0,
 		.csi = 0,
-		.mclk_default_rate = 26700000,
-		.mclk_target_rate = 96000000,	//only for mt9p031
+		.mclk_default_rate = 27000000,
+		.mclk_target_rate = 60000000,	//only for mt9p031
 		.use_pll = 0,					//only for mt9p031
 	}, {
 		.flags = MXC_CAMERA_DATAWIDTH_10,
 		.ipu = 1,
 		.csi = 1,
-		.mclk_default_rate = 26700000,
-		.mclk_target_rate = 96000000,	//only for mt9p031
+		.mclk_default_rate = 27000000,
+		.mclk_target_rate = 60000000,	//only for mt9p031
 		.use_pll = 0,					//only for mt9p031
 	},
 };
@@ -1319,40 +1319,40 @@ static void __init mx6_phyflex_init(void)
 		if(csi0_cam_type!=NULL){/* set the max MCLK for the Camera-Type and Interface-Type */
  			if(strcmp(csi0_interface_type,"phyCAM-P")==0) {
         	        	if(strcmp("mt9m001",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 40000000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 43200000;
 					mxc_ipu_csi_pdata[0].flags = MXC_CAMERA_DATAWIDTH_10 | MXC_CAMERA_PCP;
 				}
 	                	if(strcmp("tw9911",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 27000000;
 					phyflex_iclinks[0].priv=&tw9910_info;
 				}
 				if(strcmp("mt9m111",csi0_cam_type)==0) {
 					mxc_ipu_csi_pdata[0].mclk_default_rate = 54000000;
 				}
                 		if(strcmp("mt9v022",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 27000000;
 				}
                 		if(strcmp("mt9p031",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 53400000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 54000000;
 					mxc_ipu_csi_pdata[0].use_pll = 0;
 					phyflex_iclinks[0].flags=SOCAM_SENSOR_INVERT_PCLK;
 				} /* The PLL in the mt9p031 generated 96 MHZ */
         		} else if(strcmp(csi0_interface_type,"phyCAM-S+")==0) {
         	                if(strcmp("mt9m001",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 40000000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 36000000;
 				}
 	                        if(strcmp("tw9910",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 27000000;
 					phyflex_iclinks[0].priv=&tw9910_info;
 				}
 				if(strcmp("mt9m111",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 40000000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 36000000;
 				}
                         	if(strcmp("mt9v022",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 27000000;
 				}
                        		if(strcmp("mt9p031",csi0_cam_type)==0) {
-					mxc_ipu_csi_pdata[0].mclk_default_rate = 80000000;
+					mxc_ipu_csi_pdata[0].mclk_default_rate = 54000000;
 					phyflex_iclinks[0].flags=SOCAM_SENSOR_INVERT_PCLK;
 				}
 			}
@@ -1361,41 +1361,41 @@ static void __init mx6_phyflex_init(void)
 		if(csi1_cam_type!=NULL) {/* set the max MCLK for the Camera-Type and Interface-Type */
                 	if(strcmp(csi1_interface_type,"phyCAM-P")==0) {
                         	if(strcmp("mt9m001",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 40000000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 43200000;
 					mxc_ipu_csi_pdata[1].flags=MXC_CAMERA_DATAWIDTH_10 | MXC_CAMERA_PCP;
 				}
                         	if(strcmp("tw9910",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 27000000;
 					phyflex_iclinks[1].priv=&tw9910_info;
 				}
 				if(strcmp("mt9m111",csi1_cam_type)==0) {
 					mxc_ipu_csi_pdata[1].mclk_default_rate = 54000000;
 				}
                         	if(strcmp("mt9v022",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 27000000;
 				}
                         	if(strcmp("mt9p031",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 53400000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 54000000;
 					mxc_ipu_csi_pdata[1].use_pll = 0;
 					phyflex_iclinks[1].flags=SOCAM_SENSOR_INVERT_PCLK;
 				} /*The PLL in the mt9p031 generated 96 MHZ */
                 	}
                 	else if(strcmp(csi1_interface_type,"phyCAM-S+")==0) {
                         	if(strcmp("mt9m001",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 40000000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 36000000;
 				}
                        	 	if(strcmp("tw9910",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 27000000;
 					phyflex_iclinks[1].priv=&tw9910_info;
 				}
 				if(strcmp("mt9m111",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 40000000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 36000000;
 				}
                        	 	if(strcmp("mt9v022",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 26700000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 27000000;
 				}
                        	 	if(strcmp("mt9p031",csi1_cam_type)==0) {
-					mxc_ipu_csi_pdata[1].mclk_default_rate = 80000000;
+					mxc_ipu_csi_pdata[1].mclk_default_rate = 54000000;
 					phyflex_iclinks[1].flags=SOCAM_SENSOR_INVERT_PCLK;
 				}
                 	}
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c
index abbec14d2e8f..136d6af1be7d 100644
--- a/arch/arm/mach-mx6/clock.c
+++ b/arch/arm/mach-mx6/clock.c
@@ -5443,7 +5443,7 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc,
 	pcie_clk[0].disable(&pcie_clk[0]);
 
 	/* Initialize Audio and Video PLLs to valid frequency. */
-	clk_set_rate(&pll4_audio_main_clk, 160000000);
+	clk_set_rate(&pll4_audio_main_clk, 216000000);
 	clk_set_rate(&pll5_video_main_clk, 650000000);
 
 	clk_set_parent(&ipu1_di_clk[0], &pll5_video_main_clk);
@@ -5510,7 +5510,6 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc,
 	clk_set_rate(&esai_clk, clk_round_rate(&esai_clk, clk_get_rate(&pll4_audio_main_clk)));
 	clk_set_parent(&clko2_clk, &esai_clk);
 	clk_set_rate(&clko2_clk, clk_round_rate(&clko2_clk, clk_get_rate(&esai_clk)));
-
 #if defined(CONFIG_MACH_MX6Q_PHYFLEX) || defined(CONFIG_MACH_MX6Q_PHYCARD)	
 	clk_set_parent(&clko_clk, &pll4_audio_main_clk);
 #else
diff --git a/drivers/media/video/mt9p031.c b/drivers/media/video/mt9p031.c
index 624066211a85..e6cce7870cb0 100644
--- a/drivers/media/video/mt9p031.c
+++ b/drivers/media/video/mt9p031.c
@@ -210,9 +210,14 @@ static void mt9p031_video_remove(struct soc_camera_device *icd)
 /*TODO: add new dividers */
 static const struct mt9p031_pll_divs mt9p031_divs[] = {
 	/* ext_freq	target_freq	m	n	p1 */
+        {27000000,      60000000,       40,     6,      3},
 	{26000000,	48000000,	37,	5,	4},
-	{26000000,	96000000,	74,	10,	2},
-	{26700000,      96000000,       72,     10,     2}
+	{26700000,      53300000,       40,     5,      4},
+	{26700000,	96000000,	108,	10,	3},
+	{26700000,      34600000,	52,	5,	8},
+	{26700000,      62000000,       93,     10,     4},
+        {24000000,      96000000,       24,     3,      2}
+//	{26700000,      96000000,       72,     10,     2}
 };
 
 static int mt9p031_pll_get_divs(struct mt9p031 *mt9p031)