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authorRanjani Vaidyanathan <ra5478@freescale.com>2012-09-02 10:32:35 -0500
committerRanjani Vaidyanathan <ra5478@freescale.com>2012-09-03 01:27:41 -0500
commitf3ff4c24af4d5bff0bb275e79c779c22d1263797 (patch)
tree5da0573f4e5c010745143d494e44f8f207ea75e2
parentd81da79b27f8205c915b9ab78972742964e6436a (diff)
ENGR00222834 MX6x-A9 prefetcher should not access DDR before IO is restored
Add enough nops to suspend code when exiting due to a pending interrupt. This is required so that we can guarantee that the prefetch unit will not bring DDR out of self-refresh before all of the DDR's IO pads are restored. Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
-rw-r--r--arch/arm/mach-mx6/mx6_suspend.S34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/mx6_suspend.S b/arch/arm/mach-mx6/mx6_suspend.S
index 0b9dc57b0091..0533ad1b20ef 100644
--- a/arch/arm/mach-mx6/mx6_suspend.S
+++ b/arch/arm/mach-mx6/mx6_suspend.S
@@ -884,6 +884,40 @@ sl_io_restore:
sl_ddr_io_restore
ddr_io_restore_done:
+ /* Add enough nops so that the
+ * prefetcher will not get instructions
+ * from DDR before its IO pads
+ * are restored.
+ */
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
+
+ nop
+ nop
+ nop
+ nop
+ nop
mrc p15, 0, r1, c1, c0, 0
orr r1, r1, #(1 << 2) @ Enable the C bit