diff options
| author | Fugang Duan <B38611@freescale.com> | 2012-11-02 18:21:08 +0800 |
|---|---|---|
| committer | Fugang Duan <B38611@freescale.com> | 2013-03-04 13:00:47 +0800 |
| commit | 92e33b2700ccd125aa2743e4ed4d15d6de20a78a (patch) | |
| tree | 41acd126b40e7ce3d6c4c8dbda1d0835c923d664 | |
| parent | 2786868e5f56c95afd1642fe487203ac4fa523dc (diff) | |
ENGR00237452 i.MX6:IEEE1588: disable phy Ar8031 SmartEEE
Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:
Item#1: If add performance stress test while runing IEEE1588, the link
down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
no such issue found.
The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.
Signed-off-by: Fugang Duan <B38611@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_arm2.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabreauto.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabresd.c | 10 |
3 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_arm2.c b/arch/arm/mach-mx6/board-mx6q_arm2.c index b1c8eaa16535..1e42f4f2193a 100644 --- a/arch/arm/mach-mx6/board-mx6q_arm2.c +++ b/arch/arm/mach-mx6/board-mx6q_arm2.c @@ -336,6 +336,16 @@ static int mx6_arm2_fec_phy_init(struct phy_device *phydev) { unsigned short val; + /* Ar8031 phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(phydev, 0xd, 0x3); + phy_write(phydev, 0xe, 0x805d); + phy_write(phydev, 0xd, 0x4003); + val = phy_read(phydev, 0xe); + val &= ~(0x1 << 8); + phy_write(phydev, 0xe, val); + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ phy_write(phydev, 0xd, 0x7); phy_write(phydev, 0xe, 0x8016); diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c index f028fa828304..99db549427f7 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c +++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c @@ -346,6 +346,17 @@ static int mx6q_sabreauto_fec_phy_init(struct phy_device *phydev) unsigned short val; if (!board_is_mx6_reva()) { + /* Ar8031 phy SmartEEE feature cause link status generates + * glitch, which cause ethernet link down/up issue, so + * disable SmartEEE + */ + phy_write(phydev, 0xd, 0x3); + phy_write(phydev, 0xe, 0x805d); + phy_write(phydev, 0xd, 0x4003); + val = phy_read(phydev, 0xe); + val &= ~(0x1 << 8); + phy_write(phydev, 0xe, val); + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ phy_write(phydev, 0xd, 0x7); phy_write(phydev, 0xe, 0x8016); diff --git a/arch/arm/mach-mx6/board-mx6q_sabresd.c b/arch/arm/mach-mx6/board-mx6q_sabresd.c index 082de985bffb..8a9645f92026 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabresd.c +++ b/arch/arm/mach-mx6/board-mx6q_sabresd.c @@ -254,6 +254,16 @@ static int mx6q_sabresd_fec_phy_init(struct phy_device *phydev) { unsigned short val; + /* Ar8031 phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(phydev, 0xd, 0x3); + phy_write(phydev, 0xe, 0x805d); + phy_write(phydev, 0xd, 0x4003); + val = phy_read(phydev, 0xe); + val &= ~(0x1 << 8); + phy_write(phydev, 0xe, val); + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ phy_write(phydev, 0xd, 0x7); phy_write(phydev, 0xe, 0x8016); |