rtc : tps6586x: avoid RTC time is getting slowertegra-10.11.8

To ensure an accurate read of the RTC registers during the required
multi-byte read operation, the PMU RTC is designed with the following
protection scheme

- A circuit detects a write/read and locks the RTC_COUNT4 value
by keeping the RTC in a suspended mode

- During the suspended mode, a secondary counter is used to
keep track of all counts that would have normally incremented the RTC

- After the read is complete, the value of the secondary counter is
added back to the RTC registers and thereby keeping the RTC accurate

- The backup counter allows for a 1ms RTC suspend mode duration
when the RTC prescaler is enabled.

i2c needs to generate a 2 msgs when reading.
  - the address setup(write RTC_COUNT4 operation),
hence start locking the RTC_COUNT4
  - the data transfer (read RTC_COUNT4 operation),release locking it.
this may allow the CPU to execute other portions of code
in between the two operation.

The fix is to start a PMU RTC access by reading the register prior to
the RTC_COUNT4 so that access of the RTC PMU registers will be guaranteed
to always occur within the 1ms time period.
  - the address setup(write RTC_COUNT4-1 operation),
so there is no locking the RTC_COUNT4
  - the data transfer (read RTC_COUNT4 operation),
starting locking the RTC_COUNT4 and release locking the RTC_COUNT4
in one operation, so it will be guaranteed within 1ms

Bug 811075

Change-Id: Ie07472a329f6a0eed11e6a039cd93307bb5276a0
Reviewed-on: http://git-master/r/27537
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

0 files changed, 0 insertions, 0 deletions