diff options
| author | Alex Frid <afrid@nvidia.com> | 2012-01-23 13:40:48 -0800 |
|---|---|---|
| committer | Rohan Somvanshi <rsomvanshi@nvidia.com> | 2012-02-03 05:43:19 -0800 |
| commit | d83fa39d946383ce6370441ee3ad00717f6a19c1 (patch) | |
| tree | bb98361f77ebb196bd39803c86ee065965981f72 /arch/arm/mach-tegra/common.c | |
| parent | 410f87783b83d27e0f8853c190c3ef5b851ad333 (diff) | |
ARM: tegra: dvfs: Add Tegra3 x7 CPU dvfs entries
Bug 841336
Reviewed-on: http://git-master/r/76912
Change-Id: I2806c8e4f08af49edf57f00a43438b1503d6aedb
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78706
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'arch/arm/mach-tegra/common.c')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index b5c362260dd1..8b131aaf2535 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -297,7 +297,8 @@ void tegra_init_cache(bool init) } else { /* relax l2-cache latency for speedos 4,5,6 (T33's chips) */ speedo = tegra_cpu_speedo_id(); - if (speedo == 4 || speedo == 5 || speedo == 6) { + if (speedo == 4 || speedo == 5 || speedo == 6 || + speedo == 12 || speedo == 13) { writel(0x442, p + L2X0_TAG_LATENCY_CTRL); writel(0x552, p + L2X0_DATA_LATENCY_CTRL); } else { |