diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2017-06-08 10:46:24 -0700 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2017-06-08 10:46:24 -0700 |
| commit | 9262956466d4790292299644d941c1bbc8d818de (patch) | |
| tree | 0629f316fcdab1773d4217b1083d81241bb1ad34 /arch | |
| parent | 50e26af30f04d24f4783dae15206c5dba889fd2b (diff) | |
dts: imx7d: move operating points to i.MX 7Dual device tree
The i.MX 7Solo SoCs are only rated up to 800MHz. Specify higher
operating points only in the i.MX 7Dual base device tree.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/imx7d.dtsi | 8 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx7s.dtsi | 5 |
2 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 37044baa8d76..e63cc4ac89cf 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -11,6 +11,14 @@ / { cpus { + cpu0: cpu@0 { + operating-points = < + /* KHz uV */ + 996000 1075000 + 792000 975000 + >; + }; + cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi index feb640156a31..50872cc935ef 100644 --- a/arch/arm/boot/dts/imx7s.dtsi +++ b/arch/arm/boot/dts/imx7s.dtsi @@ -51,11 +51,6 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; - operating-points = < - /* KHz uV */ - 996000 1075000 - 792000 975000 - >; clock-latency = <61036>; /* two CLK32 periods */ clocks = <&clks IMX7D_ARM_A7_ROOT_CLK>, <&clks IMX7D_ARM_A7_ROOT_SRC>, <&clks IMX7D_PLL_ARM_MAIN_CLK>, <&clks IMX7D_PLL_SYS_MAIN_CLK>; |