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AgeCommit message (Expand)Author
2020-03-20perf/amd/uncore: Replace manual sampling check with CAP_NO_INTERRUPT flagKim Phillips
2020-02-28perf/x86/intel: Fix inaccurate period in context switch for auto-reloadKan Liang
2020-02-28perf/x86/amd: Add missing L2 misses event spec to AMD Family 17h's event mapKim Phillips
2020-01-12perf/x86/intel: Fix PT PMI handlingAlexander Shishkin
2019-11-12perf/x86/amd/ibs: Handle erratum #420 only on the affected CPU family (10h)Kim Phillips
2019-11-12perf/x86/amd/ibs: Fix reading of the IBS OpData register and thus precise RIP...Kim Phillips
2019-09-21perf/x86/amd/ibs: Fix sample bias for dispatched micro-opsKim Phillips
2019-09-21perf/x86/intel: Restrict period on NehalemJosh Hunt
2019-08-04perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_idSuravee Suthikulpanit
2019-08-04perf/x86/amd/uncore: Get correct number of cores sharing last level cacheJanakarajan Natarajan
2019-08-04perf/x86/amd/uncore: Rename 'L2' to 'LLC'Janakarajan Natarajan
2019-06-22perf/x86/intel/ds: Fix EVENT vs. UEVENT PEBS constraintsStephane Eranian
2019-06-22perf/x86/intel: Allow PEBS multi-entry in watermark modeStephane Eranian
2019-05-14x86/cpu: Sanitize FAM6_ATOM namingPeter Zijlstra
2019-05-10perf/x86/intel: Fix handling of wakeup_events for multi-entry PEBSStephane Eranian
2019-05-08perf/x86/amd: Update generic hardware cache events for Family 17hKim Phillips
2019-04-27perf/x86/amd: Add event map for AMD Family 17hKim Phillips
2019-03-19perf/x86: Fixup typo in stub functionsPeter Zijlstra
2019-03-13perf/x86/intel: Generalize dynamic constraint creationPeter Zijlstra (Intel)
2019-03-13perf/x86/intel: Make cpuc allocations consistentPeter Zijlstra (Intel)
2019-02-20perf/x86: Add check_period PMU callbackJiri Olsa
2019-02-12perf/x86/intel: Delay memory deallocation until x86_pmu_dead_cpu()Peter Zijlstra
2019-02-12perf/x86/intel/uncore: Add Node ID maskKan Liang
2018-12-05perf/x86/intel: Add generic branch tracing check to intel_pmu_has_bts()Jiri Olsa
2018-12-05perf/x86/intel: Move branch tracing setup to the Intel-specific source fileJiri Olsa
2018-12-01perf/x86/intel/uncore: Add more IMC PCI IDs for KabyLake and CoffeeLake CPUsKan Liang
2018-11-10perf/x86/intel/uncore: Fix PCI BDF address of M3UPI on SKXKan Liang
2018-10-10perf/x86/intel: Add support/quirk for the MISPREDICT bit on Knights Landing CPUsJacek Tomaka
2018-10-03perf/x86/intel/lbr: Fix incomplete LBR call stackKan Liang
2018-09-05perf/x86/amd/ibs: Don't access non-started eventThomas Gleixner
2018-08-03perf/x86/intel/uncore: Correct fixed counter index check for NHMKan Liang
2018-08-03perf/x86/intel/uncore: Correct fixed counter index check in generic codeKan Liang
2018-05-30perf/x86/intel: Fix event update for auto-reloadKan Liang
2018-05-30perf/x86/intel: Fix large period handling on Broadwell CPUsKan Liang
2018-05-30perf/x86/intel: Properly save/restore the PMU state in the NMI handlerKan Liang
2018-05-30perf/x86/intel: Fix linear IP of PEBS real_ip on Haswell and later CPUsStephane Eranian
2018-05-16perf/x86: Fix possible Spectre-v1 indexing for x86_pmu::event_map()Peter Zijlstra
2018-05-16perf/x86/msr: Fix possible Spectre-v1 indexing in the MSR driverPeter Zijlstra
2018-05-16perf/x86/cstate: Fix possible Spectre-v1 indexing for pkg_msrPeter Zijlstra
2018-05-16perf/x86: Fix possible Spectre-v1 indexing for hw_perf_event cache_*Peter Zijlstra
2018-03-28perf/x86/intel/uncore: Fix multi-domain PCI CHA enumeration bug on Skylake se...Kan Liang
2018-03-28perf/x86/intel: Don't accidentally clear high bits in bdw_limit_period()Dan Carpenter
2018-03-28perf/x86/intel/uncore: Fix Skylake UPI event formatKan Liang
2018-02-25perf/x86: Shut up false-positive -Wmaybe-uninitialized warningArnd Bergmann
2018-02-22x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_steppingJia Zhang
2018-02-13kaiser: fix intel_bts perf crashesHugh Dickins
2018-01-31perf/x86/amd/power: Do not load AMD power module on !AMD platformsXiao Liang
2018-01-05KPTI: Rename to PAGE_TABLE_ISOLATIONKees Cook
2018-01-05kaiser: fix perf crashesHugh Dickins
2017-12-09perf/x86/intel: Account interrupts for PEBS errorsJiri Olsa
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